M. Bohr

7.4k citations

51 papers · 4.0k · h-index 28

Impact in

Hardware and Architecture top 1%
Electrical and Electronic Engineering top 1%
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Low-power high-performance VLSI design
- Integrated Circuits and Semiconductor Failure Analysis
- Ferroelectric and Negative Capacitance Devices
- Advanced Memory and Neural Computing
- VLSI and FPGA Design Techniques

Papers in

Electrical and Electronic Engineering 50
- Semiconductor materials and devices 44
- Advancements in Semiconductor Devices and Circuit Design 38
- Low-power high-performance VLSI design 20
- Integrated Circuits and Semiconductor Failure Analysis 9
- 3D IC and TSV technologies 6
Biomedical Engineering 5
- Nanowire Synthesis and Applications 4

Co-authors: T. Ghani (13 shared papers)R. Chau (4 shared papers)Ian A. Young (1 shared paper)Fatih Hamzaoglu (12 shared papers)Yuxiao Wang (12 shared papers)Scott E. Thompson (12 shared papers)K. Mistry (8 shared papers)Kaizad Mistry (3 shared papers)
Journals: IEEE Journal of Solid-State Circuits (9 papers)Communications of the ACM (1 paper)IEEE Electron Device Letters (1 paper)Applied Surface Science (1 paper)IEEE Transactions on Semiconductor Manufacturing (1 paper)
Partner nations: United States United Kingdom

In The Last Decade

M. Bohr

48 papers receiving 3.7k citations

Peers

Countries citing papers authored by M. Bohr

Since Specialization

Citations

This map shows the geographic impact of M. Bohr's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Bohr with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Bohr more than expected).

Fields of papers citing papers by M. Bohr

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M. Bohr. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Bohr. The network helps show where M. Bohr may publish in the future.

Co-authors

The 25 scholars most cited alongside M. Bohr, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with M. Bohr Line = papers co-authored together M. Bohr links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 51 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	A Logic Nanotechnology Featuring Strained-Silicon IEEE Electron Device Letters ·Scott E. Thompson, M Armstrong, C. Auth, S. Cea, R. Chau, G. Glass, T. Hoffman, J. W. Klaus, Zhenqiang Ma, B. McIntyre, A. Murthy, B. Obradovic, L. Shifren, S. Sivakumar, S. Tyagi, T. Ghani, K. Mistry, M. Bohr, Y.A. El-Mansy	2004	389
2	A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors T. Ghani, M Armstrong, C. Auth, M. Bost, P. Charvát, G. Glass, Thomas Hoffmann, Kevin B. Johnson, C. Kenyon, J. W. Klaus, B. McIntyre, K. Mistry, A. Murthy, J. Sandford, Meredith N. Silberstein, S. Sivakumar, P. Smith, K. Zawadzki, Scott E. Thompson, M. Bohr	2004	378
3	Interconnect scaling-the real limiter to high performance ULSI M. Bohr	2002	302
4	The High-k Solution IEEE Spectrum ·M. Bohr, R. Chau, T. Ghani, Kaizad Mistry	2007	281
5	A 3-GHz 70mb SRAM in 65nm CMOS technology with integrated column-based dynamic power supply Kedong Zhang, Uma Bhattacharya, Z. Chen, Fatih Hamzaoglu, Daniel Murray, N. Vallepalli, Yuxiao Wang, B. Zheng, M. Bohr	2005	234
6	CMOS Scaling Trends and Beyond IEEE Micro ·M. Bohr, Ian A. Young	2017	211
7	A 3-GHz 70-Mb SRAM in 65-nm CMOS Technology With Integrated Column-Based Dynamic Power Supply IEEE Journal of Solid-State Circuits ·(unknown), U.K. Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel Murray, N. Vallepalli, Yuxiao Wang, B. Zheng, M. Bohr	2005	183
8	A 30 Year Retrospective on Dennard's MOSFET Scaling Paper M. Bohr	2007	167
9	SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction IEEE Journal of Solid-State Circuits ·Kedong Zhang, Uma Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel Murray, N. Vallepalli, Yuxiao Wang, B. Zheng, M. Bohr	2005	150
10	Nanotechnology goals and challenges for electronic applications IEEE Transactions on Nanotechnology ·M. Bohr	2002	132
11	Scaling challenges and device design requirements for high performance sub-50 nm gate length planar CMOS transistors T. Ghani, K. Mistry, P. Packan, Scott E. Thompson, M. Stettler, S. Tyagi, M. Bohr	2002	130
12	Diffusion of copper through dielectric films under bias temperature stress Thin Solid Films ·G. Raghavan, Chien Chiang, Paul B. Anders, Sing-Mo Tzeng, R. Villasol, Gang Bai, M. Bohr, David B. Fraser	1995	126
13	In Search of “Forever,” Continued Transistor Scaling One New Material at a Time IEEE Transactions on Semiconductor Manufacturing ·Scott E. Thompson, R. Chau, T. Ghani, K. Mistry, S. Tyagi, M. Bohr	2005	117
14	Delaying forever: Uniaxial strained silicon transistors in a 90nm CMOS technology K. Mistry, M Armstrong, C. Auth, S. Cea, Tom Coan, T. Ghani, Thomas Hoffmann, A. Murthy, J. Sandford, R. Shaheed, K. Zawadzki, Kedong Zhang, Scott E. Thompson, M. Bohr	2004	114
15	The evolution of scaling from the homogeneous era to the heterogeneous era M. Bohr	2011	110
16	Technology for advanced high-performance microprocessors IEEE Transactions on Electron Devices ·M. Bohr, Y.A. El-Mansy	1998	92
17	The new era of scaling in an SoC world M. Bohr	2009	84
18	A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active V<inf>MIN</inf>-enhancing assist circuitry Eric Karl, Yuxiao Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Uddalak Bhattacharya, Guomin Zhang, Kaizad Mistry, M. Bohr	2012	69
19	A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology IEEE Journal of Solid-State Circuits ·Fatih Hamzaoglu, Guomin Zhang, Yuxiao Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Yong-Gee Ng, A. Pavlov, Ken Smits, M. Bohr	2009	65
20	SRAM design on 65nm CMOS technology with integrated leakage reduction scheme Kedong Zhang, Uma Bhattacharya, Z. Chen, Fatih Hamzaoglu, Daniel Murray, N. Vallepalli, Yuxiao Wang, B. Zheng, M. Bohr	2004	63

About M. Bohr

M. Bohr is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Electronic, Optical and Magnetic Materials, Atomic and Molecular Physics, and Optics and Hardware and Architecture, having authored 51 papers that have together received 4.0k indexed citations. Recurring topics across this work include Semiconductor materials and devices (44 papers), Advancements in Semiconductor Devices and Circuit Design (38 papers), Low-power high-performance VLSI design (20 papers), Integrated Circuits and Semiconductor Failure Analysis (9 papers), 3D IC and TSV technologies (6 papers), Nanowire Synthesis and Applications (4 papers), Copper Interconnects and Reliability (4 papers) and Semiconductor materials and interfaces (3 papers). The work is most often cited by research in Hardware and Architecture (513 citations), Electrical and Electronic Engineering (3.6k citations), Electronic, Optical and Magnetic Materials (279 citations), Biomedical Engineering (569 citations) and Atomic and Molecular Physics, and Optics (344 citations). M. Bohr has collaborated with scholars based in United States and United Kingdom. Frequent co-authors include T. Ghani, R. Chau, Ian A. Young, Fatih Hamzaoglu, Yuxiao Wang, Scott E. Thompson, K. Mistry, Kaizad Mistry, B. Zheng and Daniel Murray. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Communications of the ACM, IEEE Electron Device Letters, Applied Surface Science and IEEE Transactions on Semiconductor Manufacturing.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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