Zhanping Chen

2.1k citations

37 papers · 1.6k · h-index 18

Impact in

Hardware and Architecture top 1%
- VLSI and Analog Circuit Testing
- Parallel Computing and Optimization Techniques
Electrical and Electronic Engineering top 2%
- Low-power high-performance VLSI design
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- VLSI and FPGA Design Techniques
- Radiation Effects in Electronics

Papers in

Hardware and Architecture 13
- VLSI and Analog Circuit Testing 11
Electrical and Electronic Engineering 37
- Low-power high-performance VLSI design 26
- Advancements in Semiconductor Devices and Circuit Design 23
- Semiconductor materials and devices 14
- Radiation Effects in Electronics 6
- VLSI and FPGA Design Techniques 6
- Integrated Circuits and Semiconductor Failure Analysis 6

Co-authors: Kaushik Roy (17 shared papers)Liqiong Wei (14 shared papers)Mark C. Johnson (3 shared papers)Vivek K. De (5 shared papers)Fatih Hamzaoglu (5 shared papers)Mark T. Bohr (5 shared papers)Yih Wang (5 shared papers)Bo Zheng (2 shared papers)
Journals: IEEE Journal of Solid-State Circuits (7 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (3 papers)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)IEEE Solid-State Circuits Letters (1 paper)International Conference on Computer Aided Design (1 paper)
Partner nations: United States Canada

In The Last Decade

Zhanping Chen

37 papers receiving 1.5k citations

Peers

Countries citing papers authored by Zhanping Chen

Since Specialization

Citations

This map shows the geographic impact of Zhanping Chen's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Zhanping Chen with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Zhanping Chen more than expected).

Fields of papers citing papers by Zhanping Chen

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Zhanping Chen. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Zhanping Chen. The network helps show where Zhanping Chen may publish in the future.

Co-authors

The 25 scholars most cited alongside Zhanping Chen, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Zhanping Chen Line = papers co-authored together Zhanping Chen links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 37 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks Zhanping Chen, Mark C. Johnson, Liqiong Wei, Kaushik Roy	1998	255
2	A 3-GHz 70-Mb SRAM in 65-nm CMOS Technology With Integrated Column-Based Dynamic Power Supply IEEE Journal of Solid-State Circuits ·Utpal Kumar Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel C. Murray, N. Vallepalli, Yih Wang, Bo Zheng, Mark T. Bohr +1 other	2005	198
3	SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction IEEE Journal of Solid-State Circuits ·Kedong Zhang, Uma Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel C. Murray, N. Vallepalli, Yih Wang, Bo Zheng	2005	162
4	Design and optimization of low voltage high performance dual threshold CMOS circuits Liqiong Wei, Zhanping Chen, Mark C. Johnson, Kaushik Roy, Vivek K. De	1998	161
5	Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors James W. Tschanz, S. Narendra, Zhanping Chen, Shekhar Y. Borkar, Manoj Sachdev, Vivek K. De	2001	138
6	Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks Zhanping Chen, Mark C. Johnson, Liqiong Wei, W. Roy	2002	89
7	Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance microprocessors James W. Tschanz, S. Narendra, Zhanping Chen, Shekhar Y. Borkar, Manoj Sachdev, Vivek K. De	2002	78
8	A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology IEEE Journal of Solid-State Circuits ·Fatih Hamzaoglu, Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Yong-Gee Ng, A. Pavlov, Ken Smits	2009	68
9	Mixed- V th (MVT) CMOS circuit design methodology for low power applications Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek K. De	1999	61
10	A 1.1 GHz 12 $\mu$A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications IEEE Journal of Solid-State Circuits ·Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Tom Coan, Fatih Hamzaoglu, W. Hafez, Chia-Hong Jan	2008	54
11	A power macromodeling technique based on power sensitivity Zhanping Chen, Kaushik Roy	1998	45
12	A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-¿ Metal-Gate CMOS Technology Fatih Hamzaoglu, Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Yong-Gee Ng, A. Pavlov, Ken Smits	2008	34
13	Power sensitivity—a new method to estimate power dissipation considering uncertain specifications of primary inputs International Conference on Computer Aided Design ·Zhanping Chen, Kaushik Roy, Tan‐Li Chou	1997	27
14	I/sub DDQ/ testing for deep-submicron ICs: challenges and solutions IEEE Design & Test of Computers ·Zhanping Chen, Liqiong Wei, Ali Reza Keshavarzi, Kaushik Roy	2002	25
15	A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 $\mu$m$^{2}$1T1R Bit Cell in 32 nm High-k Metal-Gate CMOS IEEE Journal of Solid-State Circuits ·Sarvesh H. Kulkarni, Zhanping Chen, Jun Ru He, Lei Jiang, Michael Pedersen +1 other	2010	22
16	Power sensitivity-a new method to estimate power dissipation considering uncertain specifications of primary inputs Zhanping Chen, Tan‐Li Chou +1 other	1997	19
17	Multiple-V/sub dd/ multiple-V/sub th/ CMOS (MVCMOS) for low power applications Kaushik Roy, Liqiong Wei, Zhanping Chen	2003	19
18	Double gate dynamic threshold voltage (DGDT) SOI MOSFETs for low power high performance designs Liqiong Wei, Zhanping Chen, Kaushik Roy	2002	18
19	Vertically integrated SOI circuits for low-power and high-performance applications IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Liqiong Wei, Rongtian Zhang, Kaushik Roy, Zhanping Chen, David B. Janes	2002	13
20	Design and optimization of low voltage high performance dual threshold CMOS circuits Liqiong Wei, Zhanping Chen, M. Johnson, K. Roy, V. De	2002	10

About Zhanping Chen

Zhanping Chen is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computational Theory and Mathematics, Biomedical Engineering and Mechanical Engineering, having authored 37 papers that have together received 1.6k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (26 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers), Semiconductor materials and devices (14 papers), VLSI and Analog Circuit Testing (11 papers), Radiation Effects in Electronics (6 papers), VLSI and FPGA Design Techniques (6 papers), Integrated Circuits and Semiconductor Failure Analysis (6 papers) and Analog and Mixed-Signal Circuit Design (4 papers). The work is most often cited by research in Hardware and Architecture (509 citations), Electrical and Electronic Engineering (1.5k citations), Computational Theory and Mathematics (71 citations), Biomedical Engineering (153 citations) and Computer Networks and Communications (85 citations). Zhanping Chen has collaborated with scholars based in United States and Canada. Frequent co-authors include Kaushik Roy, Liqiong Wei, Mark C. Johnson, Vivek K. De, Fatih Hamzaoglu, Mark T. Bohr, Yih Wang, Bo Zheng, Daniel C. Murray and S. Narendra. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Solid-State Circuits Letters and International Conference on Computer Aided Design.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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