John Golz

432 citations

25 papers · 304 · h-index 11

Impact in

Hardware and Architecture top 10%
- Parallel Computing and Optimization Techniques
Electrical and Electronic Engineering
- Semiconductor materials and devices
- Advanced Memory and Neural Computing
- Advancements in Semiconductor Devices and Circuit Design
- Low-power high-performance VLSI design
- 3D IC and TSV technologies

Papers in

Electrical and Electronic Engineering 19
- Semiconductor materials and devices 13
- 3D IC and TSV technologies 7
- Low-power high-performance VLSI design 6
- Advancements in Semiconductor Devices and Circuit Design 4
- Electronic Packaging and Soldering Technologies 3
Mechanics of Materials 5
- Metal and Thin Film Mechanics 4

Co-authors: T. Kirihata (11 shared papers)Subramanian S. Iyer (11 shared papers)B.L. Halpern (7 shared papers)P. Parries (5 shared papers)Norman Robson (8 shared papers)Hoki Kim (3 shared papers)T.P. Ma (2 shared papers)J. Barth (6 shared papers)
Journals: IEEE Journal of Solid-State Circuits (3 papers)Ironmaking & Steelmaking Processes Products and Applications (1 paper)Applied Surface Science (1 paper)IEEE Electron Device Letters (1 paper)Japanese Journal of Applied Physics (1 paper)
Partner nations: United States India Canada

In The Last Decade

John Golz

25 papers receiving 289 citations

Peers

Countries citing papers authored by John Golz

Since Specialization

Citations

This map shows the geographic impact of John Golz's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by John Golz with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites John Golz more than expected).

Fields of papers citing papers by John Golz

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by John Golz. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by John Golz. The network helps show where John Golz may publish in the future.

Co-authors

The 25 scholars most cited alongside John Golz, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with John Golz Line = papers co-authored together John Golz links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 25 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier IEEE Journal of Solid-State Circuits ·J. Barth, W. Reohr, P. Parries, G. Fredeman, John Golz, S.E. Schuster, Richard E. Matick, Hillery C. Hunter, Charles C. Tanner, Joseph Harig, Hoki Kim, (unknown), J. Griesemer, R.P. Havreluk, (unknown), T. Kirihata, Subramanian S. Iyer	2008	48
2	An 800-MHz embedded DRAM with a concurrent refresh mode IEEE Journal of Solid-State Circuits ·T. Kirihata, P. Parries, David R. Hanson, Hoki Kim, John Golz, G. Fredeman, Raj Rajeevakumar, J. Griesemer, Norman Robson, Alberto Cestero, B. Khan, Geng Wang, M.R. Wordeman, Subramanian S. Iyer	2005	35
3	A 500MHz Random Cycle 1.5ns-Latency, SOI Embedded DRAM Macro Featuring a 3T Micro Sense Amplifier J. Barth, W. Reohr, P. Parries, G. Fredeman, John Golz, S.E. Schuster, Richard E. Matick, Hillery C. Hunter, Charles C. Tanner, Joseph Harig, Hoki Kim, Babar A. Khan, J. Griesemer, R.P. Havreluk, Kenji YANAGISAWA, T. Kirihata, Subramanian S. Iyer	2007	26
4	High-quality MNS capacitors prepared by jet vapor deposition at room temperature IEEE Electron Device Letters ·D. Wang, T.P. Ma, John Golz, B.L. Halpern, J.J. Schmitt	1992	23
5	Highly Reliable Silicon Nitride Thin Films Made by Jet Vapor Deposition Japanese Journal of Applied Physics ·Xiewen Wang, Tso-Ping Ma, Guang-Ji Cui, Takashi Tamagawa, John Golz, Simon Karechi, Bret H. Halpern, Jerome J. Schmitt	1995	21
6	Gas jet deposition of thin films Applied Surface Science ·B.L. Halpern, J.J. Schmitt, John Golz, Yunxiang Di, D. Lynn Johnson	1991	20
7	3D stackable 32nm High-K/Metal Gate SOI embedded DRAM prototype John Golz, John Safran, Bishan He, Derek Leu, Ming Yin, Todd Weaver, Adis Vehabovic, Yan Sun, Alberto Cestero, Ben Himmel, Gary Maier, C. Kothandaraman, Daniel Fainstein, J. Barth, Norman Robson, T. Kirihata, K. Rim, Subramanian S. Iyer	2011	16
8	Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias IEEE Journal on Emerging and Selected Topics in Circuits and Systems ·T. Kirihata, John Golz, M.R. Wordeman, Pooja Batra, Gary Maier, Norman Robson, Troy Graves-Abe, Daniel S. Berger, Subramanian S. Iyer	2016	15
9	Three-Dimensional Wafer Stacking Using Cu TSV Integrated with 45 nm High Performance SOI-CMOS Embedded DRAM Technology Journal of Low Power Electronics and Applications ·Pooja Batra, Spyridon Skordas, D. LaTulipe, Kevin Winstel, C. Kothandaraman, Ben Himmel, Gary Maier, Bishan He, Deepal Wehella Gamage, John Golz, (unknown), Tuan Vo, Deepika Priyadarshini, Alex Hubbard, Kristian Cauffman, B. Peethala, J. Barth, T. Kirihata, Troy Graves-Abe, Norman Robson, Subramanian S. Iyer	2014	11
10	Three-dimensional wafer stacking using Cu TSV integrated with 45nm high performance SOI-CMOS embedded DRAM technology Pooja Batra, D. LaTulipe, Spyridon Skordas, Kevin Winstel, C. Kothandaraman, Ben Himmel, Gary Maier, Bishan He, Deepal Wehella Gamage, John Golz, (unknown), Tuan Vo, Deepika Priyadarshini, Alex Hubbard, Kristian Cauffman, B. Peethala, J. Barth, T. Kirihata, Troy Graves-Abe, Norman Robson, Subramanian S. Iyer	2013	10
11	80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable Memory scalable to 14nm FIN with no added process complexity Janakiraman Viraraghavan, Derek Leu, Balaji Jayaraman, Alberto Cestero, Robert Kilker, Ming Yin, John Golz, Rajesh R. Tummuru, Ramesh Raghavan, D. Moy, Thejas Kempanna, Faraz Khan, T. Kirihata, Subramanian Iyer	2016	10
12	An 800MHz embedded DRAM with a concurrent refresh mode T. Kirihata, P. Parries, David R. Hanson, Hyungsub Kim, John Golz, G. Fredeman, Raj Rajeevakumar, J. Griesemer, Norman Robson, Alberto Cestero, M.R. Wordeman, Subramanian S. Iyer	2004	8
13	Structure and properties of jet vapor deposited aluminum-aluminum oxide nanoscale laminates Scripta Metallurgica et Materialia ·L.M. Hsiung, J.Z. Zhang, D.C. McIntyre, John Golz, B.L. Halpern, J.J. Schmitt, H.N.G. Wadley	1993	8
14	80-kb Logic Embedded High-K Charge Trap Transistor-Based Multi-Time-Programmable Memory With No Added Process Complexity IEEE Journal of Solid-State Circuits ·Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan, Alberto Cestero, Ming Yin, John Golz, Rajesh R. Tummuru, Ramesh Raghavan, D. Moy, Thejas Kempanna, Faraz Khan, T. Kirihata, Subramanian S. Iyer	2018	8
15	Extending gate dielectric scaling limit by use of nitride or oxynitride X.W. Wang, Ying Shi, T.P. Ma, G.J. Cui, T. Tamagawa, John Golz, B.L. Halpen, J.J. Schmitt	2002	8
16	Highly Reliable Silicon Nitride Films Made by Jet Vapor Deposition X. W. Wang, T-P. Ma, G.J. Cui, T. Tamagawa, John Golz, Simon Karecki, B.L. Halpern, J.J. Schmitt	1994	7
17	Copper through silicon via (TSV) for 3D integration C. Kothandaraman, Ben Himmel, John Safran, John Golz, Gary Maier, Mukta Farooq, Troy Graves-Abe, W. Landers, R. Volant, K. Petrarca, F. Chen, Timothy D. Sullivan, G. LaRosa, Norman Robson, R. Hannon, S. S. Iyer	2012	6
18	Through silicon via (TSV) effects on devices in close proximity - the role of mobile ion penetration - characterization and mitigation C. Kothandaraman, Sidney Cohen, C. Parks, John Golz, Krishna Tunga, Sami Rosenblatt, John Safran, C. J. Collins, W. Landers, Jennifer Oakley, J. Liu, Andreas Martin, K. Petrarca, Mukta Farooq, Troy Graves-Abe, Norman Robson, Subramanian S. Iyer	2014	5
19	Ferroelectric Pb(Zr, Ti)O3 thin films prepared by Gas Jet Deposition Integrated ferroelectrics ·C. L. Hwang, B. A. Chen, Topoljanskij A.P., John Golz, Yunxiang Di, B.L. Halpern, J.J. Schmitt	1992	5
20	Signal and Power Integrity Design and Analysis for Bunch-of-Wires (BoW) Interface for Chiplet Integration on Advanced Packaging Ram Krishna, Atom O. Watanabe, John Golz, Ravi Bonam, Frank Libsch, Elyse Rosenbaum, Arvind Kumar	2023	4

About John Golz

John Golz is a scholar working on Electrical and Electronic Engineering, Mechanics of Materials, Materials Chemistry, Biomedical Engineering and Computer Networks and Communications, having authored 25 papers that have together received 304 indexed citations. Recurring topics across this work include Semiconductor materials and devices (13 papers), 3D IC and TSV technologies (7 papers), Low-power high-performance VLSI design (6 papers), Metal and Thin Film Mechanics (4 papers), Advancements in Semiconductor Devices and Circuit Design (4 papers), Diamond and Carbon-based Materials Research (3 papers), Interconnection Networks and Systems (3 papers) and Electronic Packaging and Soldering Technologies (3 papers). The work is most often cited by research in Hardware and Architecture (76 citations), Electrical and Electronic Engineering (250 citations), Computer Networks and Communications (71 citations), Automotive Engineering (12 citations) and Mechanics of Materials (21 citations). John Golz has collaborated with scholars based in United States, India and Canada. Frequent co-authors include T. Kirihata, Subramanian S. Iyer, B.L. Halpern, P. Parries, Norman Robson, Hoki Kim, T.P. Ma, J. Barth, Alberto Cestero and Yunxiang Di. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Ironmaking & Steelmaking Processes Products and Applications, Applied Surface Science, IEEE Electron Device Letters and Japanese Journal of Applied Physics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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