J. Urresti

528 citations

34 papers · 425 · h-index 12

Impact in

Electrical and Electronic Engineering top 10%
- Silicon Carbide Semiconductor Technologies
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Electrostatic Discharge in Electronics
- Electromagnetic Compatibility and Noise Suppression
- Multilevel Inverters and Converters
- Advanced DC-DC Converters
- Integrated Circuits and Semiconductor Failure Analysis
Electronic, Optical and Magnetic Materials

Papers in

Electrical and Electronic Engineering 34
- Silicon Carbide Semiconductor Technologies 31
- Semiconductor materials and devices 16
- Electrostatic Discharge in Electronics 13
- Advancements in Semiconductor Devices and Circuit Design 11
- Electromagnetic Compatibility and Noise Suppression 11
- Advanced DC-DC Converters 4
- Multilevel Inverters and Converters 4
- Thin-Film Transistor Technologies 3
Electronic, Optical and Magnetic Materials 2

Co-authors: J. Rebollo (18 shared papers)S. Hidalgo (15 shared papers)Alberto Castellazzi (7 shared papers)X. Perpiñà (8 shared papers)X. Jordà (8 shared papers)Asad Fayyaz (4 shared papers)G. Romano (4 shared papers)Andrea Irace (4 shared papers)
Journals: Microelectronics Reliability (5 papers)Solid-State Electronics (3 papers)IEEE Transactions on Electron Devices (2 papers)IEEE Electron Device Letters (2 papers)Semiconductor Science and Technology (1 paper)
Partner nations: Spain United Kingdom France

In The Last Decade

J. Urresti

33 papers receiving 407 citations

Peers

Countries citing papers authored by J. Urresti

Since Specialization

Citations

This map shows the geographic impact of J. Urresti's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Urresti with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Urresti more than expected).

Fields of papers citing papers by J. Urresti

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Urresti. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Urresti. The network helps show where J. Urresti may publish in the future.

Co-authors

The 25 scholars most cited alongside J. Urresti, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with J. Urresti Line = papers co-authored together J. Urresti links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 34 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Analysis of Clamped Inductive Turnoff Failure in Railway Traction IGBT Power Modules Under Overload Conditions IEEE Transactions on Industrial Electronics ·X. Perpiñà, J.F. Servière, J. Urresti, Ignasi Cortés, X. Jordà, S. Hidalgo, J. Rebollo, Michel Mermet-Guyennet	2010	48
2	UIS failure mechanism of SiC power MOSFETs Nottingham ePrints (University of Nottingham) ·Asad Fayyaz, Alberto Castellazzi, G. Romano, Michele Riccio, Andrea Irace, J. Urresti, (unknown)	2016	44
3	A Comprehensive Study on the Avalanche Breakdown Robustness of Silicon Carbide Power MOSFETs Energies ·Asad Fayyaz, G. Romano, J. Urresti, Michele Riccio, Alberto Castellazzi, Andrea Irace, (unknown)	2017	39
4	Increased Mobility in Enhancement Mode 4H-SiC MOSFET Using a Thin SiO₂/ Al₂O₃Gate Stack IEEE Electron Device Letters ·Faiz Arith, J. Urresti, Konstantin Vasilevskiy, Sarah H. Olsen, Nicolas G. Wright, A.G. O’Neill	2018	36
5	Analysis of hot-carrier degradation in a SOI LDMOS transistor with a steep retrograde drift doping profile Microelectronics Reliability ·(unknown), J. Roig, D. Flores, J. Urresti, S. Hidalgo, J. Rebollo	2004	31
6	IGBT module failure analysis in railway applications Microelectronics Reliability ·X. Perpiñà, J.F. Servière, X. Jordà, A. Fauquet, S. Hidalgo, J. Urresti, J. Rebollo, Michel Mermet-Guyennet	2008	29
7	Layout Role in Failure Physics of IGBTs Under Overloading Clamped Inductive Turnoff IEEE Transactions on Electron Devices ·X. Perpiñà, Ignasi Cortés, J. Urresti, X. Jordà, J. Rebollo	2012	24
8	Transient out-of-SOA robustness of SiC power MOSFETs Nottingham ePrints (University of Nottingham) ·Alberto Castellazzi, Asad Fayyaz, G. Romano, Michele Riccio, Andrea Irace, J. Urresti, (unknown)	2017	23
9	Design and Analysis of High Mobility Enhancement-Mode 4H-SiC MOSFETs Using a Thin-SiO₂/Al₂O₃Gate-Stack IEEE Transactions on Electron Devices ·J. Urresti, Faiz Arith, Sarah H. Olsen, Nicolas G. Wright, A.G. O’Neill	2019	22
10	A numerical study of field plate configurations in RF SOI LDMOS transistors Solid-State Electronics ·(unknown), J. Roig, D. Flores, J. Urresti, S. Hidalgo, J. Rebollo	2005	19
11	Robustness test and failure analysis of IGBT modules during turn-off Microelectronics Reliability ·J. Urresti, Alberto Castellazzi, Michel Piton, J. Rebollo, Michel Mermet-Guyennet, Mauro Ciappa	2007	15
12	Influence of gate bias on the avalanche ruggedness of SiC power MOSFETs Nottingham ePrints (University of Nottingham) ·Asad Fayyaz, Alberto Castellazzi, G. Romano, Michele Riccio, Andrea Irace, J. Urresti, Nicolas G. Wright	2017	14
13	Integrated Compact Modelling of a Planar-Gate Non-Punch-Through 3.3kV-1200A IGBT Module for Insightful Analysis and Realistic Interpretation of the Failure Mechanisms Alberto Castellazzi, Mauro Ciappa, Wolf Fïchtner, J. Urresti, Michel Mermet-Guyennet	2007	11
14	Modeling of non-uniform heat generation in LDMOS transistors Solid-State Electronics ·J. Roig, D. Flores, J. Urresti, S. Hidalgo, J. Rebollo	2004	9
15	Edge termination impact on clamped inductive turn-off failure in high-voltage IGBTs under overcurrent conditions X. Perpiñà, (unknown), J. Urresti, X. Jordà, J. Rebollo, José del R. Millán	2011	7
16	Analysis and optimization of safe-operating-area of LUDMOS transistors based on 0.18 µm SOI CMOS technology Semiconductor Science and Technology ·(unknown), G. Toulon, Frédéric Morancho, J. Urresti, X. Perpiñà, B. Villard	2010	7
17	Lateral punch-through TVS devices for on-chip protection in low-voltage applications Microelectronics Reliability ·J. Urresti, S. Hidalgo, D. Flores, J. Roig, (unknown), J. Rebollo	2004	6
18	Over-current turn-off failure in high voltage IGBT modules under clamped inductive load European Conference on Power Electronics and Applications ·X. Perpiñà, J.F. Servière, X. Jordà, S. Hidalgo, J. Urresti, J. Rebollo, Michel Mermet-Guyennet	2009	5
19	IGBT design optimisation for solid-state circuit breaker applications Ihsan Supono, Alberto Castellazzi, J. Urresti, D. Flores	2013	5
20	Efficiency of SOI-Like Structures for Reducing the Thermal Resistance in Thin-Film SOI Power LDMOSFETs IEEE Electron Device Letters ·J. Roig, J. Urresti, (unknown), D. Flores, S. Hidalgo, José del R. Millán	2004	4

About J. Urresti

J. Urresti is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials, Control and Systems Engineering, Hardware and Architecture and Mechanical Engineering, having authored 34 papers that have together received 425 indexed citations. Recurring topics across this work include Silicon Carbide Semiconductor Technologies (31 papers), Semiconductor materials and devices (16 papers), Electrostatic Discharge in Electronics (13 papers), Advancements in Semiconductor Devices and Circuit Design (11 papers), Electromagnetic Compatibility and Noise Suppression (11 papers), Advanced DC-DC Converters (4 papers), Multilevel Inverters and Converters (4 papers) and Thin-Film Transistor Technologies (3 papers). The work is most often cited by research in Electrical and Electronic Engineering (415 citations), Electronic, Optical and Magnetic Materials (17 citations), Control and Systems Engineering (21 citations), Condensed Matter Physics (10 citations) and Mechanical Engineering (26 citations). J. Urresti has collaborated with scholars based in Spain, United Kingdom and France. Frequent co-authors include J. Rebollo, S. Hidalgo, Alberto Castellazzi, X. Perpiñà, X. Jordà, Asad Fayyaz, G. Romano, Andrea Irace, Michele Riccio and D. Flores. Their work appears in journals such as Microelectronics Reliability, Solid-State Electronics, IEEE Transactions on Electron Devices, IEEE Electron Device Letters and Semiconductor Science and Technology.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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