V. Chan

2.2k citations

56 papers · 1.7k · 2 hit papers · h-index 21

Impact in

Electrical and Electronic Engineering top 2%
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Integrated Circuits and Semiconductor Failure Analysis
- Thin-Film Transistor Technologies
Hardware and Architecture top 10%

Papers in

Electrical and Electronic Engineering 52
- Semiconductor materials and devices 29
- Advancements in Semiconductor Devices and Circuit Design 24
- Integrated Circuits and Semiconductor Failure Analysis 12
- Thin-Film Transistor Technologies 10
- Ferroelectric and Negative Capacitance Devices 10
- Advanced Memory and Neural Computing 10
Materials Chemistry 13
- Phase-change materials and chalcogenides 8

Co-authors: Philip C. H. Chan (15 shared papers)Mansun Chan (5 shared papers)Meikei Ieong (3 shared papers)Min Yang (2 shared papers)Evgeni Gusev (1 shared paper)Kevin K. F. Chan (1 shared paper)Anthony I. Chou (1 shared paper)James H. Stathis (1 shared paper)
Journals: IEEE Transactions on Electron Devices (5 papers)IEEE Electron Device Letters (4 papers)IEEE Transactions on Device and Materials Reliability (2 papers)IEEE Transactions on Semiconductor Manufacturing (2 papers)Applied Physics Letters (2 papers)
Partner nations: United States Hong Kong Switzerland

In The Last Decade

V. Chan

52 papers receiving 1.6k citations

V. Chan's Hit Papers

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An analog-AI chip for energy-efficient speech recognition and transcription 2023 · 161 citations

What are hit papers?

Paper score: A paper's citations measured against the top-1% bar of its own field and year: the square root of citations ÷ bar, so 1 means right at the bar and 2 means four times its citations. The bar blends the citation counts that enter the top 1% of the paper's subfields in its year (weighted 89.5%), of those subfields over all years (0.5%) and of its year across all fields (10%); a subfield and year with fewer than 400 papers takes its year's bar. Papers from 2026 are not scored yet: in an unfinished year, when a paper appeared matters more than how it is cited.

Hit paper: A paper cited at least 1.5× the top-1% bar of its field and year: a paper score of at least √1.5.

2023 Nature
2023 Nature Electronics

Peers

Countries citing papers authored by V. Chan

Since Specialization

Citations

This map shows the geographic impact of V. Chan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by V. Chan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites V. Chan more than expected).

Fields of papers citing papers by V. Chan

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by V. Chan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by V. Chan. The network helps show where V. Chan may publish in the future.

Co-authors

The 25 scholars most cited alongside V. Chan, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with V. Chan Line = papers co-authored together V. Chan links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 56 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference Nature Electronics ·Manuel Le Gallo, Riduan Khaddam-Aljameh, Miloš Stanisavljević, Athanasios Vasilopoulos, Benedikt Kersting, Martino Dazzi, Geethan Karunaratne, Matthias Brändli Hit paper breakdown →	2023	205
2	An analog-AI chip for energy-efficient speech recognition and transcription Nature ·Stefano Ambrogio, Pritish Narayanan, Atsuya Okazaki, Andrea Fasoli, Charles Mackin, Kohji Hosokawa, Akiyo Nomura, Takeo Yasuda Hit paper breakdown →	2023	161
3	Hybrid-orientation technology (HOT): opportunities and challenges IEEE Transactions on Electron Devices ·Min Yang, V. Chan, Kevin K. F. Chan, L. Shi, David Fried, James H. Stathis, Anthony I. Chou, Evgeni Gusev	2006	134
4	Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing Haining Yang, R. Malik, Y. Li, Rama Divakaruni, Paul D. Agnello, Scott D. Allen, Arsam Antreasyan, John C. Arnold	2005	109
5	HERMES-Core—A 1.59-TOPS/mm 2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs IEEE Journal of Solid-State Circuits ·Riduan Khaddam-Aljameh, Miloš Stanisavljević, Jordi Fornt, Geethan Karunaratne, Matthias Brändli, Feng Liu, Abhairaj Singh, Silvia M. Müller	2022	101
6	HERMES Core – A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing Riduan Khaddam-Aljameh, Miloš Stanisavljević, Jordi Fornt, Geethan Karunaratne, Matthias Bräendli, Faju Liu, Abhairaj Singh, Silvia M. Müller	2021	94
7	Effects of fog on the bit-error rate of a free-space laser communication system Applied Optics ·Brian R. Strickland, Michael J. Lavan, Eric L. Woodbridge, V. Chan	1999	85
8	High performance and low power transistors integrated in 65nm bulk CMOS technology Zuying Luo, An Steegen, Manfred Eller, Randy W. Mann, Christopher V. Baiocco, P. Nguyen, L. Kim, Mark Hoinkis	2005	68
9	High speed 45nm gate length CMOSFETs integrated into a 90nm bulk technology incorporating strain engineering V. Chan, Rajesh Rengarajan, Nivo Rovedo, Wei Jin, Terence B. Hook, P. Nguyen, Jia Chen, Etienne Nowak	2004	64
10	High performance CMOS fabricated on hybrid substrate with different crystal orientations Min Yang, Meikei Ieong, L. Shi, Kevin K. F. Chan, V. Chan, Anthony I. Chou, Evgeni Gusev, Keith A. Jenkins	2004	63
11	FINFET technology featuring high mobility SiGe channel for 10nm and beyond Dechao Guo, G. Karve, Gen Tsutsui, KY Lim, Robert R. Robison, Terence B. Hook, Reinaldo A. Vega, D. Liu	2016	53
12	Transistor scaling with novel materials Materials Today ·Meikei Ieong, Vijay Narayanan, D. V. Singh, Anna W. Topol, V. Chan, Zhibin Ren	2006	47
13	Strain for CMOS performance improvement V. Chan, K. Rim, Meikei Leong, Shu Ching Yang, R. Malik, Young Way Teh, Min Yang, Qiqing Christine Ouyang	2006	43
14	Integrated liquid crystal optical switch based on total internal reflection Applied Physics Letters ·Ailing Zhang, Kam Tai Chan, M.S. Demokan, V. Chan, Philip C. H. Chan, Hoi Sing Kwok, Hau Ping Chan	2005	36
15	The effects of grain boundaries in the electrical characteristics of large grain polycrystalline thin-film transistors IEEE Transactions on Electron Devices ·V. Chan, Philip C. H. Chan, Chunshan Yin	2002	32
16	Three-dimensional CMOS SOI integrated circuit using high-temperature metal-induced lateral crystallization IEEE Transactions on Electron Devices ·V. Chan, Philip C. H. Chan, Mansun Chan	2001	29
17	Gate-Induced-Drain-Leakage Current in 45-nm CMOS Technology IEEE Transactions on Device and Materials Reliability ·Xiaobin Yuan, Jae-Eun Park, Jing Wang, Enhai Zhao, D. Ahlgren, Terence B. Hook, Jun Tang Yuan, V. Chan	2008	29
18	On the integration of CMOS with hybrid crystal orientations Min Yang, V. Chan, S.H. Ku, Meikei Ieong, L. Shi, Kevin K. F. Chan, Ch. S. N. Murthy, Rongcheng Mo	2004	27
19	Palmprint Classification Fang Li, Maylor K. H. Leung, Tejas Shikhare, V. Chan, Kean Fatt Choon	2006	26
20	Three dimensional CMOS integrated circuits on large grain polysilicon films Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·V. Chan, Philip C. H. Chan, Mansun Chan	2002	26

About V. Chan

V. Chan is a scholar working on Electrical and Electronic Engineering, Materials Chemistry, Hardware and Architecture, Biomedical Engineering and Computer Vision and Pattern Recognition, having authored 56 papers that have together received 1.7k indexed citations. Recurring topics across this work include Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (24 papers), Integrated Circuits and Semiconductor Failure Analysis (12 papers), Thin-Film Transistor Technologies (10 papers), Ferroelectric and Negative Capacitance Devices (10 papers), Advanced Memory and Neural Computing (10 papers), Phase-change materials and chalcogenides (8 papers) and Nanowire Synthesis and Applications (6 papers). The work is most often cited by research in Electrical and Electronic Engineering (1.5k citations), Hardware and Architecture (69 citations), Artificial Intelligence (218 citations), Cellular and Molecular Neuroscience (90 citations) and Biomedical Engineering (187 citations). V. Chan has collaborated with scholars based in United States, Hong Kong and Switzerland. Frequent co-authors include Philip C. H. Chan, Mansun Chan, Meikei Ieong, Min Yang, Evgeni Gusev, Kevin K. F. Chan, Anthony I. Chou, James H. Stathis, John A. Ott and David Fried. Their work appears in journals such as IEEE Transactions on Electron Devices, IEEE Electron Device Letters, IEEE Transactions on Device and Materials Reliability, IEEE Transactions on Semiconductor Manufacturing and Applied Physics Letters.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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V. Chan's Hit Papers

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