Peter Vandervoorn

1.9k citations
15 papers · 1.5k · 1 hit paper · h-index 12

Impact in

    • Semiconductor materials and devices
    • Advancements in Semiconductor Devices and Circuit Design
    • Integrated Circuits and Semiconductor Failure Analysis
    • Ferroelectric and Negative Capacitance Devices
    • Low-power high-performance VLSI design
    • Radio Frequency Integrated Circuit Design
    • Silicon Carbide Semiconductor Technologies

Papers in

    • Advancements in Semiconductor Devices and Circuit Design 10
    • Semiconductor materials and devices 10
    • 3D IC and TSV technologies 6
    • Radio Frequency Integrated Circuit Design 6
    • Silicon Carbide Semiconductor Technologies 2
    • Low-power high-performance VLSI design 2
    • VLSI and Analog Circuit Testing 1

Peter Vandervoorn

15 papers receiving 1.4k citations

Peter Vandervoorn's Hit Papers

A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging 2007 · 649 citations
6490+6+12Years since publication200400600

Peers

Peter Vandervoorn
Comparison fields: 5 of 41
  • Electrical and Electronic Engineering 1.4k
  • Hardware and Architecture 132
  • Biomedical Engineering 194
  • Materials Chemistry 180
  • Atomic and Molecular Physics, and Optics 114
Replace S. Joshi with:
S. Joshi United States
Cory E. Weber United States
Dureseti Chidambarrao United States
Rama Divakaruni United States
Pieter Schuddinck Belgium
T. Troeger United States
Ramune Nagisetty United States
Jan M. Neirynck United States
P. Batude France
I. Post United States
Peter Vandervoorn relative to S. Joshi United States S. Joshi's profile →
Citations per field
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Citations per year

Countries citing papers authored by Peter Vandervoorn

Since Specialization
Citations

This map shows the geographic impact of Peter Vandervoorn's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Peter Vandervoorn with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Peter Vandervoorn more than expected).

Fields of papers citing papers by Peter Vandervoorn

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Peter Vandervoorn. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Peter Vandervoorn. The network helps show where Peter Vandervoorn may publish in the future.

Co-authors

The 7 scholars most cited alongside Peter Vandervoorn, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Peter Vandervoorn Line = papers co-authored together Peter Vandervoorn links everyone, so they are left out of the graph.

All Works

15 of 15 papers shown
#Work
1
A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging
Hit paper breakdown →
2007649
2 2012266
3 2008157
4 201077
5 201376
6 200967
7 200449
8 201542
9 201030
10 200327
11
A 22nm high performance embedded DRAM SoC technology featuring tri-gate transistors and MIMCAP COB
201315
12 199614
13 201212
14 201210
15
Design, fabrication, and characterization of shallow trench isolation and raised source/drains for 100nm CMOS
19981

About Peter Vandervoorn

Peter Vandervoorn is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Electronic, Optical and Magnetic Materials, Computer Networks and Communications and Insect Science, having authored 15 papers that have together received 1.5k indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (10 papers), Semiconductor materials and devices (10 papers), 3D IC and TSV technologies (6 papers), Radio Frequency Integrated Circuit Design (6 papers), Silicon Carbide Semiconductor Technologies (2 papers), Low-power high-performance VLSI design (2 papers), VLSI and Analog Circuit Testing (1 paper) and Interconnection Networks and Systems (1 paper). The work is most often cited by research in Electrical and Electronic Engineering (1.4k citations), Hardware and Architecture (132 citations), Biomedical Engineering (194 citations), Materials Chemistry (180 citations) and Atomic and Molecular Physics, and Optics (114 citations). Peter Vandervoorn has collaborated with scholars based in United States. Frequent co-authors include J. Peter Krusius, Ian A. Young, Kelin J. Kuhn, M. Hattendorf, Paul A. Packan, I. Post and D. Becher. Their work appears in journals such as IEEE Transactions on Electron Devices and IEEE Journal of Solid-State Circuits.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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