D. Plass
Impact in
- Hardware and Architecture top 5%
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
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- Low-power high-performance VLSI design
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- VLSI and FPGA Design Techniques
Papers in
-
- Low-power high-performance VLSI design 13
- Semiconductor materials and devices 12
- Advancements in Semiconductor Devices and Circuit Design 7
- Advanced Memory and Neural Computing 2
- Ferroelectric and Negative Capacitance Devices 1
- VLSI and FPGA Design Techniques 1
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- VLSI and Analog Circuit Testing 4
- Network Packet Processing and Optimization 1
- Co-authors
- Y.H. Chan (9 shared papers)Ching-Te Chuang (3 shared papers)Eric Fluhr (4 shared papers)Joshua Friedrich (3 shared papers)Subhas Chandra Mukhopadhyay (1 shared paper)Rajiv Joshi (2 shared papers)A. Devgan (1 shared paper)W. Huott (4 shared papers)
- Journals
- IEEE Journal of Solid-State Circuits (1 paper)IBM Journal of Research and Development (1 paper)
- Partner nations
- United StatesGermanyTaiwan
In The Last Decade
D. Plass
16 papers receiving 346 citations
Peers
Comparison fields: 5 of 33
- Hardware and Architecture 174
- Electrical and Electronic Engineering 308
- Computational Mathematics 2
- Computer Networks and Communications 68
- Computational Theory and Mathematics 13
Countries citing papers authored by D. Plass
This map shows the geographic impact of D. Plass's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Plass with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Plass more than expected).
Fields of papers citing papers by D. Plass
This network shows the impact of papers produced by D. Plass. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Plass. The network helps show where D. Plass may publish in the future.
Co-authors
The 25 scholars most cited alongside D. Plass, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2007 | 94 | |
| 2 | 2007 | 47 | |
| 3 | 2014 | 39 | |
| 4 | 2004 | 39 | |
| 5 | 2009 | 25 | |
| 6 | 2007 | 18 | |
| 7 | 2006 | 18 | |
| 8 | 2006 | 18 | |
| 9 | 2017 | 15 | |
| 10 | Design and Implementation of the POWER5 TM Microprocessor | 2004 | 12 |
| 11 | 2006 | 12 | |
| 12 | 2015 | 7 | |
| 13 | 2008 | 7 | |
| 14 | 2008 | 4 | |
| 15 | 2002 | 2 | |
| 16 | 2002 | 1 |
About D. Plass
D. Plass is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Computer Networks and Communications, Statistics, Probability and Uncertainty and Biomedical Engineering, having authored 16 papers that have together received 358 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (13 papers), Semiconductor materials and devices (12 papers), Advancements in Semiconductor Devices and Circuit Design (7 papers), VLSI and Analog Circuit Testing (4 papers), Advanced Memory and Neural Computing (2 papers), Ferroelectric and Negative Capacitance Devices (1 paper), VLSI and FPGA Design Techniques (1 paper) and Network Packet Processing and Optimization (1 paper). The work is most often cited by research in Hardware and Architecture (174 citations), Electrical and Electronic Engineering (308 citations), Computational Mathematics (2 citations), Computer Networks and Communications (68 citations) and Computational Theory and Mathematics (13 citations). D. Plass has collaborated with scholars based in United States, Germany and Taiwan. Frequent co-authors include Y.H. Chan, Ching-Te Chuang, Eric Fluhr, Joshua Friedrich, Subhas Chandra Mukhopadhyay, Rajiv Joshi, A. Devgan, W. Huott, Gaurav Mittal and J. DiLullo. Their work appears in journals such as IEEE Journal of Solid-State Circuits and IBM Journal of Research and Development.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.