J. DiLullo
Impact in
- Hardware and Architecture top 10%
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
Papers in
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- Parallel Computing and Optimization Techniques 1
- VLSI and Analog Circuit Testing 1
-
- Low-power high-performance VLSI design 3
- 3D IC and TSV technologies 1
- Semiconductor materials and devices 1
- VLSI and FPGA Design Techniques 1
- Co-authors
- D. Plass (2 shared papers)Joshua Friedrich (2 shared papers)Brian Curran (1 shared paper)Y.H. Chan (1 shared paper)Mary Yvonne Lanzerotti (1 shared paper)Scott A. Taylor (1 shared paper)H. Q. Le (1 shared paper)Bradley D. McCredie (1 shared paper)
- Partner nations
- United StatesGermany
In The Last Decade
J. DiLullo
3 papers receiving 118 citations
Peers
Comparison fields: 5 of 25
- Hardware and Architecture 78
- Computational Mathematics 1
- Electrical and Electronic Engineering 88
- Computer Networks and Communications 35
- Computational Theory and Mathematics 10
Countries citing papers authored by J. DiLullo
This map shows the geographic impact of J. DiLullo's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. DiLullo with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. DiLullo more than expected).
Fields of papers citing papers by J. DiLullo
This network shows the impact of papers produced by J. DiLullo. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. DiLullo. The network helps show where J. DiLullo may publish in the future.
Co-authors
The 25 scholars most cited alongside J. DiLullo, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2007 | 90 | |
| 2 | 2007 | 20 | |
| 3 | Design and Implementation of the POWER5 TM Microprocessor | 2004 | 12 |
About J. DiLullo
J. DiLullo is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computer Networks and Communications, Insect Science and Renewable Energy, Sustainability and the Environment, having authored 3 papers that have together received 122 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (3 papers), 3D IC and TSV technologies (1 paper), Semiconductor materials and devices (1 paper), Parallel Computing and Optimization Techniques (1 paper), Interconnection Networks and Systems (1 paper), VLSI and Analog Circuit Testing (1 paper) and VLSI and FPGA Design Techniques (1 paper). The work is most often cited by research in Hardware and Architecture (78 citations), Computational Mathematics (1 citation), Electrical and Electronic Engineering (88 citations), Computer Networks and Communications (35 citations) and Computational Theory and Mathematics (10 citations). J. DiLullo has collaborated with scholars based in United States and Germany. Frequent co-authors include D. Plass, Joshua Friedrich, Brian Curran, Y.H. Chan, Mary Yvonne Lanzerotti, Scott A. Taylor, H. Q. Le, Bradley D. McCredie, Gaurav Naresh Mittal and N. James. Their work appears in journals such as IBM Journal of Research and Development.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.