C. Tabone

2.6k citations

58 papers · 1.1k · h-index 18

Impact in

Electrical and Electronic Engineering top 5%
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Integrated Circuits and Semiconductor Failure Analysis
- Ferroelectric and Negative Capacitance Devices
- Silicon Carbide Semiconductor Technologies
- 3D IC and TSV technologies
- Thin-Film Transistor Technologies
Biomedical Engineering top 10%
- Nanowire Synthesis and Applications

Papers in

Electrical and Electronic Engineering 58
- Semiconductor materials and devices 53
- Advancements in Semiconductor Devices and Circuit Design 50
- Ferroelectric and Negative Capacitance Devices 14
- Integrated Circuits and Semiconductor Failure Analysis 9
- Thin-Film Transistor Technologies 5
- Silicon and Solar Cell Technologies 4
- 3D IC and TSV technologies 4
Biomedical Engineering 17
- Nanowire Synthesis and Applications 16

Co-authors: C. Le Royer (35 shared papers)B. Prévitali (15 shared papers)S. Deleonibus (17 shared papers)M. Vinet (28 shared papers)Jean‐Michel Hartmann (25 shared papers)K. Romanjek (8 shared papers)L. Clavelier (17 shared papers)F. Mayer (3 shared papers)
Journals: Solid-State Electronics (8 papers)IEEE Transactions on Electron Devices (4 papers)IEEE Electron Device Letters (2 papers)Applied Physics Letters (2 papers)Microelectronic Engineering (1 paper)
Partner nations: France United States Switzerland

In The Last Decade

C. Tabone

57 papers receiving 1.1k citations

Peers

Countries citing papers authored by C. Tabone

Since Specialization

Citations

This map shows the geographic impact of C. Tabone's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by C. Tabone with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites C. Tabone more than expected).

Fields of papers citing papers by C. Tabone

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by C. Tabone. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by C. Tabone. The network helps show where C. Tabone may publish in the future.

Co-authors

The 25 scholars most cited alongside C. Tabone, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with C. Tabone Line = papers co-authored together C. Tabone links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 58 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Impact of SOI, Si<inf>1-x</inf>Ge<inf>x</inf>OI and GeOI substrates on CMOS compatible Tunnel FET performance F. Mayer, C. Le Royer, J.-F. Damlencourt, K. Romanjek, F. Andrieu, C. Tabone, B. Prévitali, S. Deleonibus	2008	198
2	GeOI pMOSFETs Scaled Down to 30-nm Gate Length With Record Off-State Current IEEE Electron Device Letters ·Louis Hutin, C. Le Royer, J.-F. Damlencourt, Jean‐Michel Hartmann, H. Grampeix, V. Mazzocchi, C. Tabone, B. Prévitali, A. Pouydebasque, M. Vinet, O. Faynot	2010	93
3	Tunneling field-effect transistor with epitaxial junction in thin germanium-on-insulator Applied Physics Letters ·Dimitrios Kazazis, Pooya Jannaty, A. Zaslavsky, C. Le Royer, C. Tabone, L. Clavelier, S. Cristoloveanu	2009	74
4	Strained tunnel FETs with record I<inf>ON</inf>: first demonstration of ETSOI TFETs with SiGe channel and RSD A. Villalon, C. Le Royer, M. Cassé, David Cooper, B. Prévitali, C. Tabone, Jean‐Michel Hartmann, P. Perreau, P. Rivallin, J.F. Damlencourt, F. Allain, F. Andrieu, O. Weber, O. Faynot, T. Poiroux	2012	57
5	3D monolithic integration: Technological challenges and electrical results Microelectronic Engineering ·M. Vinet, P. Batude, C. Tabone, B. Prévitali, Cyrille LeRoyer, A. Pouydebasque, L. Clavelier, Alexandre Valentian, Olivier Thomas, S. Michaud, L. Sanchez, L. Baud, A. Roman, V. Carron, F. Nemouchi, V. Mazzocchi, H. Grampeix, Ayed Ben Amara, S. Deleonibus, O. Faynot	2010	52
6	3D sequential integration opportunities and technology optimization P. Batude, B. Sklénard, C. Fenouillet-Béranger, B. Prévitali, C. Tabone, O. Rozeau, Olivier Billoint, Ogun Turkyilmaz, Hossam Sarhan, Sébastien Thuries, G. Cibrario, Laurent Brunet, Fabien Deprat, J-E. Michallet, F. Clermidy, M. Vinet	2014	44
7	Scaling of high-k/metal-gate Trigate SOI nanowire transistors down to 10nm width R. Coquand, Sylvain Barraud, M. Cassé, Paul Leroux, C. Vizioz, C. Comboroure, P. Perreau, E Ernst, Marie-Pierre Samson, V. Maffini-Alvaro, C. Tabone, S. Barnola, Daniela Munteanu, G. Ghibaudo, S. Monfray, F. Bœuf, T. Poiroux	2012	42
8	Investigation of tunnel field-effect transistors as a capacitor-less memory cell Applied Physics Letters ·Arnab Biswas, Nilay Daǧtekın, Wladek Grabinski, Antonios Bazigos, C. Le Royer, Jean‐Michel Hartmann, C. Tabone, M. Vinet, Adrian M. Ionescu	2014	36
9	High performance 70nm gate length germanium-on-insulator pMOSFET with high-k/metal gate Solid-State Electronics ·K. Romanjek, Louis Hutin, C. Le Royer, A. Pouydebasque, M.-A. Jaud, C. Tabone, E. Augendre, L. Sanchez, Jean‐Michel Hartmann, H. Grampeix, V. Mazzocchi, S. Soliverès, R. Truche, L. Clavelier, P. Scheiblin, X. Garros, G. Reimbold, M. Vinet, F. Boulanger, S. Deleonibus	2009	32
10	Localized ultra-thin GeOI: An innovative approach to germanium channel MOSFETs on bulk Si substrates E. Batail, S. Monfray, C. Tabone, O. Kermarrec, J.F. Damlencourt, P. Gautier, G. Rabillé, C. Arvet, N. Loubet, Y. Campidelli, JM. Hartmann, A. Pouydebasque, V. Delaye, C. Le Royer, G. Ghibaudo, T. Skotnicki, S. Deleonibus	2008	25
11	105nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200mm GeOI wafers Solid-State Electronics ·C. Le Royer, L. Clavelier, C. Tabone, K. Romanjek, C. Deguet, L. Sanchez, Jean‐Michel Hartmann, Marie-Christine Roure, H. Grampeix, S. Soliverès, G. Le Carval, R. Truche, A. Pouydebasque, M. Vinet, S. Deleonibus	2008	24
12	Schottky Barrier Height Extraction in Ohmic Regime: Contacts on Fully Processed GeOI Substrates Journal of The Electrochemical Society ·Louis Hutin, C. Le Royer, C. Tabone, V. Delaye, F. Nemouchi, F. Aussenac, L. Clavelier, M. Vinet	2009	23
13	20nm gate length trigate pFETs on strained SGOI for high performance CMOS Louis Hutin, M. Cassé, C. Le Royer, J.F. Damlencourt, A. Pouydebasque, C. Xu, C. Tabone, Jean‐Michel Hartmann, V. Carron, H. Grampeix, V. Mazzocchi, R. Truche, O. Weber, P. Batude, X. Garros, L. Clavelier, M. Vinet, O. Faynot	2010	21
14	Experimental Investigation of the Tunneling Injection Boosters for Enhanced $I_{ON}$ ETSOI Tunnel FET IEEE Transactions on Electron Devices ·A. Villalon, C. Le Royer, M. Cassé, David Cooper, Jean‐Michel Hartmann, F. Allain, C. Tabone, F. Andrieu, S. Cristoloveanu	2013	19
15	3D monolithic integration P. Batude, M. Vinet, A. Pouydebasque, C. Le Royer, B. Prévitali, C. Tabone, Jean‐Michel Hartmann, L. Sanchez, L. Baud, V. Carron, A. Toffoli, F. Allain, V. Mazzocchi, D. Lafond, S. Deleonibus, O. Faynot	2011	18
16	Co-integration of 2 mV/dec Subthreshold Slope Impact Ionization MOS (I-MOS) with CMOS F. Mayer, C. Le Royer, G. Le Carval, C. Tabone, L. Clavelier, S. Deleonibus	2006	17
17	High-$\kappa$ and Metal-Gate pMOSFETs on GeOI Obtained by Ge Enrichment: Analysis of ON and OFF Performances IEEE Electron Device Letters ·C. Le Royer, Benjamin Vincent, L. Clavelier, J.-F. Damlencourt, C. Tabone, P. Batude, D. Blachier, R. Truche, Y. Campidelli, Quang Trung Nguyen, S. Cristoloveanu, S. Soliverès, G. Le Carval, F. Boulanger, T. Billon, D. Bensahel, S. Deleonibus	2008	17
18	Enabling 3D Monolithic Integration ECS Transactions ·P. Batude, M. Vinet, A. Pouydebasque, L. Clavelier, Cyrille LeRoyer, C. Tabone, B. Prévitali, Loïc Sanchez, L. Baud, Antonio Roman, V. Carron, F. Nemouchi, S. Pocas, C. Comboroure, V. Mazzocchi, H. Grampeix, F. Aussenac, S. Deleonibus	2008	17
19	Study of carrier transport in strained and unstrained SOI tri-gate and omega-gate silicon nanowire MOSFETs Solid-State Electronics ·Masahiro Koyama, M. Cassé, R. Coquand, Sylvain Barraud, C. Vizioz, C. Comboroure, P. Perreau, V. Maffini-Alvaro, C. Tabone, L. Tosti, S. Barnola, V. Delaye, F. Aussenac, G. Ghibaudo, Hiroshi Iwai, G. Reimbold	2013	17
20	Strained Silicon Directly on Insulator N- and P-FET nanowire transistors Sylvain Barraud, Romain Laviéville, C. Tabone, F. Allain, M. Cassé, Marie-Pierre Samson, V. Maffini-Alvarro, M. Vinet	2014	15

About C. Tabone

C. Tabone is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Atomic and Molecular Physics, and Optics, Computer Networks and Communications and Instrumentation, having authored 58 papers that have together received 1.1k indexed citations. Recurring topics across this work include Semiconductor materials and devices (53 papers), Advancements in Semiconductor Devices and Circuit Design (50 papers), Nanowire Synthesis and Applications (16 papers), Ferroelectric and Negative Capacitance Devices (14 papers), Integrated Circuits and Semiconductor Failure Analysis (9 papers), Thin-Film Transistor Technologies (5 papers), Silicon and Solar Cell Technologies (4 papers) and 3D IC and TSV technologies (4 papers). The work is most often cited by research in Electrical and Electronic Engineering (1.1k citations), Biomedical Engineering (292 citations), Atomic and Molecular Physics, and Optics (87 citations), Hardware and Architecture (16 citations) and Structural Biology (2 citations). C. Tabone has collaborated with scholars based in France, United States and Switzerland. Frequent co-authors include C. Le Royer, B. Prévitali, S. Deleonibus, M. Vinet, Jean‐Michel Hartmann, K. Romanjek, L. Clavelier, F. Mayer, F. Andrieu and J.-F. Damlencourt. Their work appears in journals such as Solid-State Electronics, IEEE Transactions on Electron Devices, IEEE Electron Device Letters, Applied Physics Letters and Microelectronic Engineering.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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