M.-R. Lin

406 citations

22 papers · 300 · h-index 9

Impact in

Electrical and Electronic Engineering top 10%
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- Low-power high-performance VLSI design
- Electrostatic Discharge in Electronics
- VLSI and FPGA Design Techniques
- Integrated Circuits and Semiconductor Failure Analysis
Atomic and Molecular Physics, and Optics
- Semiconductor materials and interfaces

Papers in

Electrical and Electronic Engineering 21
- Advancements in Semiconductor Devices and Circuit Design 18
- Semiconductor materials and devices 10
- Plasma Diagnostics and Applications 1
- Electronic Packaging and Soldering Technologies 1
Electronic, Optical and Magnetic Materials 2
- Copper Interconnects and Reliability 2

Co-authors: W. Maszara (9 shared papers)Peng Fang (4 shared papers)Jung-Suk Goo (3 shared papers)Chenming Calvin Hu (2 shared papers)Elyse Rosenbaum (1 shared paper)Geoffrey C-F Yeap (3 shared papers)Victor Moroz (1 shared paper)Qian Xiang (6 shared papers)
Journals: IEEE Electron Device Letters (2 papers)IEEE Transactions on Electron Devices (2 papers)Proteins Structure Function and Bioinformatics (1 paper)IEEE Transactions on Semiconductor Manufacturing (1 paper)Semiconductor Science and Technology (1 paper)
Partner nations: United States Taiwan

In The Last Decade

M.-R. Lin

21 papers receiving 281 citations

Peers

Countries citing papers authored by M.-R. Lin

Since Specialization

Citations

This map shows the geographic impact of M.-R. Lin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M.-R. Lin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M.-R. Lin more than expected).

Fields of papers citing papers by M.-R. Lin

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M.-R. Lin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M.-R. Lin. The network helps show where M.-R. Lin may publish in the future.

Co-authors

The 25 scholars most cited alongside M.-R. Lin, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with M.-R. Lin Line = papers co-authored together M.-R. Lin links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 22 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gates W. Maszara, Paul L. King, Jung-Suk Goo, M.-R. Lin +1 other	2003	62
2	Predicting CMOS speed with gate oxide and voltage scaling and interconnect loading effects IEEE Transactions on Electron Devices ·K. Chen, Chenming Calvin Hu, Peng Fang, M.-R. Lin, Donald L. Wollesen	1997	45
3	Nickel silicide metal gate FDSOI devices with improved gate oxide leakage W. Maszara, K. Achutan, Paul L. King, Max V. Sidorov, E. Zhao, Jianbing Zhang, J. Chan, Arunprasad P. Marathe	2003	30
4	Hot carrier effects in nMOSFETs in 0.1 μm CMOS technology IEEE International Reliability Physics Symposium proceedings ·E. Li, Elyse Rosenbaum, J. Tao, Geoffrey C-F Yeap, M.-R. Lin, Peng Fang	2003	28
5	FinFETs - Technology and circuit design challenges W. Maszara, M.-R. Lin	2013	24
6	Performance of 70 nm strained-silicon CMOS devices Symposium on VLSI Technology ·Jung R. Hwang, J.H. Ho, S.M. Ting, Tsung‐Yen Chen, Yung‐Yu Hsieh, Yi-Ying Chiang, H. K. Lee, A. Liu	2004	23
7	Locally strained ultra-thin channel 25nm narrow FDSOI devices with metal gate and mesa isolation Technical digest - International Electron Devices Meeting/Technical digest ·Victor Moroz, W. Maszara, M.-R. Lin +1 other	2004	16
8	Characterization and optimization of metal etch processes to minimize charging damage to submicron transistor gate oxide IEEE Electron Device Letters ·M.-R. Lin, Peng Fang, F.P. Heiler, R. Lee, Rajat Rakkhit, Lei Shen	1994	11
9	High performance 25 nm FDSOI devices with extremely thin silicon channel Symposium on VLSI Technology ·W. Maszara, F. Arasnia, Eric Paton, Y. Kim, Lori Washington, E. Zhao, J. Chan, Jianbing Zhang	2004	10
10	High Performance 45nm CMOS Technology with 20nm Multi-Gate Devices International Conference on Solid State Devices and Materials (SSDM) ·Cyrus E. Tabery, W. Maszara, Qian Xiang, M.-R. Lin +1 other	2003	9
11	The Effect of Annealing Temperatures on Self-Aligned Replacement (Damascene) TaCN–TaN-Stacked Gate pMOSFETs IEEE Transactions on Electron Devices ·James N. Pan, Christy Woo, Madison Ngo, Jin Xie, Jung-Suk Goo, Qian Xiang, M.-R. Lin +2 others	2004	9
12	FinFETs — Technology and circuit design challenges European Solid-State Device Research Conference ·W. Maszara, M.-R. Lin	2013	7
13	Impact of Ceramic Packaging Anneal on the Reliability of Al Interconnects IEEE International Reliability Physics Symposium proceedings ·M.-R. Lin, J.T. Yue	1986	6
14	Manufacturability of 20-nm Ultrathin Body Fully Depleted SOI Devices With FUSI Metal Gates IEEE Transactions on Semiconductor Manufacturing ·W. Maszara, M.-R. Lin +1 other	2005	6
15	Sub-100 nm nMOSFETs with direct tunneling thermal, nitrous and nitric oxides Conference digest ·Geoffrey C-F Yeap, Qian Xiang, Miryeong Song, Khaled Z. Ahmed, D.S. Bang, Effiong Ibok, M.-R. Lin	2002	4
16	CVD Rhenium and PVD Tantalum Gate MOSFETs Fabricated With a Replacement Technique IEEE Electron Device Letters ·James N. Pan, Donald F. Canaperi, R. Jammy, Michelle L. Steen, John Pellerin, M.-R. Lin	2004	3
17	Experimental studies on deep submicron CMOS scaling Semiconductor Science and Technology ·K Chen, Chenming Calvin Hu, Peng Fang, Aniket Gupta, M.-R. Lin, Donald L. Wollesen	1998	2
18	Polarity dependent reliability of advanced MOSFET using MOCVD nitrided Hf-silicate high-k gate dielectric IEEE International Integrated Reliability Workshop final report ·Jianbing Zhang, E. Zhao, Qian Xiang, J. Chan, J. Jeon, Jung-Suk Goo, Arunprasad P. Marathe, Bob Ogle	2003	2
19	High performance sub-60 nm SOI MOSFETs with 1.2 nm thick nitride/oxide gate dielectric Symposium on VLSI Technology ·W. Maszara, Srikanth Krishnan, Qian Xiang, M.-R. Lin	2002	1
20	Novel Approach to Reduce Source/Drain Series Resistance in High Performance CMOS Devices Using Self-Aligned CoWP Process for 45nm Node UTSOI Transistors with 20nm Gate Length Symposium on VLSI Technology ·Anna W. Topol, I. Shao, D. V. Singh, C.Y. Sung, Meikei Ieong, John Pellerin, John A. Iacoponi, M.-R. Lin +2 others	2006	1

About M.-R. Lin

M.-R. Lin is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials, Atomic and Molecular Physics, and Optics, Computational Theory and Mathematics and Molecular Biology, having authored 22 papers that have together received 300 indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (18 papers), Semiconductor materials and devices (10 papers), Semiconductor materials and interfaces (3 papers), Copper Interconnects and Reliability (2 papers), Protein Structure and Dynamics (1 paper), Plasma Diagnostics and Applications (1 paper), Electronic Packaging and Soldering Technologies (1 paper) and Computational Drug Discovery Methods (1 paper). The work is most often cited by research in Electrical and Electronic Engineering (283 citations), Atomic and Molecular Physics, and Optics (45 citations), Hardware and Architecture (8 citations), Electronic, Optical and Magnetic Materials (8 citations) and Bioengineering (1 citation). M.-R. Lin has collaborated with scholars based in United States and Taiwan. Frequent co-authors include W. Maszara, Peng Fang, Jung-Suk Goo, Chenming Calvin Hu, Elyse Rosenbaum, Geoffrey C-F Yeap, Victor Moroz, Qian Xiang, Arunprasad P. Marathe and Jianbing Zhang. Their work appears in journals such as IEEE Electron Device Letters, IEEE Transactions on Electron Devices, Proteins Structure Function and Bioinformatics, IEEE Transactions on Semiconductor Manufacturing and Semiconductor Science and Technology.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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