Mark Tehranipoor
Impact in
- Hardware and Architecture top 0.5%
- Physical Unclonable Functions (PUFs) and Hardware Security
- VLSI and Analog Circuit Testing
- Signal Processing top 5%
- Advanced Malware Detection Techniques
Papers in
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- Physical Unclonable Functions (PUFs) and Hardware Security 74
- VLSI and Analog Circuit Testing 30
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- Integrated Circuits and Semiconductor Failure Analysis 60
- Advanced Memory and Neural Computing 8
- Low-power high-performance VLSI design 8
- Co-authors
- Domenic Forte (18 shared papers)Farimah Farahmandi (44 shared papers)Mehrdad Nourani (2 shared papers)Fahim Rahman (21 shared papers)Xuehui Zhang (1 shared paper)Swarup Bhunia (4 shared papers)Nisar Ahmed (4 shared papers)Krishnendu Chakrabarty (2 shared papers)
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (6 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (5 papers)IEEE Design and Test (5 papers)ACM Transactions on Design Automation of Electronic Systems (3 papers)ACM Journal on Emerging Technologies in Computing Systems (2 papers)
- Partner nations
- United StatesJapanFrance
In The Last Decade
Mark Tehranipoor
99 papers receiving 1.6k citations
Peers
Comparison fields: 5 of 55
- Hardware and Architecture 1.4k
- Signal Processing 214
- Electrical and Electronic Engineering 1.1k
- Artificial Intelligence 472
- Cellular and Molecular Neuroscience 235
Countries citing papers authored by Mark Tehranipoor
This map shows the geographic impact of Mark Tehranipoor's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mark Tehranipoor with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mark Tehranipoor more than expected).
Fields of papers citing papers by Mark Tehranipoor
This network shows the impact of papers produced by Mark Tehranipoor. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mark Tehranipoor. The network helps show where Mark Tehranipoor may publish in the future.
Co-authors
The 25 scholars most cited alongside Mark Tehranipoor, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
Showing the 20 most-cited of 104 papers — load more, or switch the sort, to bring in the rest.
| # | Work | ||
|---|---|---|---|
| 1 | 2005 | 114 | |
| 2 | 2011 | 86 | |
| 3 | 2017 | 70 | |
| 4 | 2006 | 70 | |
| 5 | 2014 | 62 | |
| 6 | 2017 | 57 | |
| 7 | 2015 | 52 | |
| 8 | 2021 | 47 | |
| 9 | 2018 | 42 | |
| 10 | 2019 | 42 | |
| 11 | 2017 | 38 | |
| 12 | 2005 | 38 | |
| 13 | 2018 | 36 | |
| 14 | 2005 | 36 | |
| 15 | 2018 | 33 | |
| 16 | 2021 | 33 | |
| 17 | 2017 | 32 | |
| 18 | 2019 | 32 | |
| 19 | 2016 | 31 | |
| 20 | 2021 | 28 |
About Mark Tehranipoor
Mark Tehranipoor is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Artificial Intelligence, Cellular and Molecular Neuroscience and Signal Processing, having authored 104 papers that have together received 1.7k indexed citations. Recurring topics across this work include Physical Unclonable Functions (PUFs) and Hardware Security (74 papers), Integrated Circuits and Semiconductor Failure Analysis (60 papers), VLSI and Analog Circuit Testing (30 papers), Security and Verification in Computing (22 papers), Neuroscience and Neural Engineering (19 papers), Cryptographic Implementations and Security (16 papers), Advanced Memory and Neural Computing (8 papers) and Low-power high-performance VLSI design (8 papers). The work is most often cited by research in Hardware and Architecture (1.4k citations), Signal Processing (214 citations), Electrical and Electronic Engineering (1.1k citations), Artificial Intelligence (472 citations) and Cellular and Molecular Neuroscience (235 citations). Mark Tehranipoor has collaborated with scholars based in United States, Japan and France. Frequent co-authors include Domenic Forte, Farimah Farahmandi, Mehrdad Nourani, Fahim Rahman, Xuehui Zhang, Swarup Bhunia, Nisar Ahmed, Krishnendu Chakrabarty, Prabhat Mishra and Jim Plusquellic. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Design and Test, ACM Transactions on Design Automation of Electronic Systems and ACM Journal on Emerging Technologies in Computing Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.