Mark A Anders

4.1k citations

146 papers · 3.3k · h-index 29

Impact in

Hardware and Architecture top 0.5%
- Physical Unclonable Functions (PUFs) and Hardware Security
Electrical and Electronic Engineering top 2%
- Low-power high-performance VLSI design
- Advanced Memory and Neural Computing
- Semiconductor materials and devices
- Integrated Circuits and Semiconductor Failure Analysis
- Advancements in Semiconductor Devices and Circuit Design

Papers in

Hardware and Architecture 56
- Physical Unclonable Functions (PUFs) and Hardware Security 18
- VLSI and Analog Circuit Testing 17
Electrical and Electronic Engineering 103
- Low-power high-performance VLSI design 40
- Semiconductor materials and devices 33
- Advancements in Semiconductor Devices and Circuit Design 27
- Silicon Carbide Semiconductor Technologies 15

Co-authors: Ram Kumar Krishnamurthy (89 shared papers)Sanu K. Mathew (78 shared papers)Himanshu Kaul (71 shared papers)Amit Agarwal (57 shared papers)Shekhar Y. Borkar (33 shared papers)Steven Hsu (46 shared papers)Steven K. Hsu (21 shared papers)Sudhir K. Satpathy (29 shared papers)
Journals: IEEE Journal of Solid-State Circuits (22 papers)Journal of Applied Physics (6 papers)Composites Part A Applied Science and Manufacturing (3 papers)Journal of Vacuum Science & Technology A Vacuum Surfaces and Films (2 papers)Scientific Reports (2 papers)
Partner nations: United States Germany Israel

In The Last Decade

Mark A Anders

143 papers receiving 3.2k citations

Peers

Countries citing papers authored by Mark A Anders

Since Specialization

Citations

This map shows the geographic impact of Mark A Anders's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mark A Anders with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mark A Anders more than expected).

Fields of papers citing papers by Mark A Anders

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Mark A Anders. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mark A Anders. The network helps show where Mark A Anders may publish in the future.

Co-authors

The 25 scholars most cited alongside Mark A Anders, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Mark A Anders Line = papers co-authored together Mark A Anders links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 146 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS Sanu K. Mathew, Sudhir K. Satpathy, Mark A Anders, Himanshu Kaul, Steven K. Hsu, Amit Agarwal, Gregory K. Chen, Rachael J. Parker	2014	209
2	Domain Structures in Langmuir-Blodgett Films Investigated by Atomic Force Microscopy Science ·L. F. Chi, Mark A Anders, Harald Fuchs, Robert R. Johnston, Helmut Ringsdorf	1993	187
3	Near-threshold voltage (NTV) design Himanshu Kaul, Mark A Anders, Steven Hsu, Amit Agarwal, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2012	185
4	2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Suresh Srinivasan, Mark A Anders, Himanshu Kaul, Steven K. Hsu, Farhana Sheikh, Amit Agarwal, Sudhir K. Satpathy	2012	162
5	340 mV–1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Sudhir K. Satpathy, Vikram Suresh, Mark A Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Gregory Chen	2015	120
6	53 Gbps Native ${\rm GF}(2 ^{4}) ^{2}$ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Farhana Sheikh, Michael E. Kounavis, Shay Gueron, Steven K. Hsu, Himanshu Kaul, Mark A Anders, Ram Kumar Krishnamurthy +1 other	2011	115
7	A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS IEEE Journal of Solid-State Circuits ·Sudhir K. Satpathy, Sanu K. Mathew, Vikram Suresh, Mark A Anders, Himanshu Kaul, Steven K. Hsu, Gregory Chen, Ram Kumar Krishnamurthy	2017	102
8	An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS IEEE Journal of Solid-State Circuits ·Sudhir K. Satpathy, Sanu K. Mathew, Raghavan Kumar, Vikram Suresh, Mark A Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu	2019	86
9	$\mu $ RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, David J. Johnston, Sudhir K. Satpathy, Vikram Suresh, Paul Newman, Mark A Anders, Himanshu Kaul, Amit Agarwal	2016	85
10	A 4-GHz 130-nm address generation unit with 32-bit sparse-tree adder core IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Mark A Anders, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2003	80
11	Vectorized magnetometer for space applications using electrical readout of atomic scale defects in silicon carbide Scientific Reports ·Corey Jonathan Cochrane, Jordana Blacksberg, Mark A Anders, Patrick M. Lenahan	2016	80
12	An Improved Unified Scalable Radix-2 Montgomery Multiplier David Money Harris, Ram Kumar Krishnamurthy, Mark A Anders, Sanu K. Mathew, Steven Hsu	2005	79
13	A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Mark A Anders, B. Bloechel, Trang Thi Thu Nguyen, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2005	67
14	A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS IEEE Journal of Solid-State Circuits ·Himanshu Kaul, Mark A Anders, Sanu K. Mathew, Steven K. Hsu, Ram Kumar Krishnamurthy, Shekhar Y. Borkar +1 other	2009	64
15	A 110 GOPS/W 16-bit Multiplier and Reconfigurable PLA Loop in 90-nm CMOS IEEE Journal of Solid-State Circuits ·Shu-Hao Hsu, Sanu K. Mathew, Mark A Anders, Bart R. Zeydel, Vojin G. Oklobdzija, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2005	60
16	Investigation of Bloch wall fine structures by magnetic force microscopy Journal of Microscopy ·Thomas Göddenhenrich, Uwe Herbert Hartmann, Mark A Anders, Christoph Heiden	1988	59
17	2.4GHz 7mW all-digital PVT-variation tolerant True Random Number Generator in 45nm CMOS Suresh Srinivasan, Sanu K. Mathew, Rajaraman Ramanarayanan, Farhana Sheikh, Mark A Anders, Himanshu Kaul, Vasantha Erraguntla, Ram Kumar Krishnamurthy	2010	47
18	A 280mV-to-1.1V 256b reconfigurable SIMD vector permutation engine with 2-dimensional shuffle in 22nm CMOS Steven Hsu, Amit Agarwal, Mark A Anders, Sanu K. Mathew, Himanshu Kaul, Farhana Sheikh, Ram Kumar Krishnamurthy	2012	45
19	A 340 mV-to-0.9 V 20.2 Tb/s Source-Synchronous Hybrid Packet/Circuit-Switched 16 × 16 Network-on-Chip in 22 nm Tri-Gate CMOS IEEE Journal of Solid-State Circuits ·Gregory Chen, Mark A Anders, Himanshu Kaul, Sudhir K. Satpathy, Sanu K. Mathew, Steven K. Hsu, Amit Agarwal, Ram Kumar Krishnamurthy	2014	44
20	A 1.45GHz 52-to-162GFLOPS/W variable-precision floating-point fused multiply-add unit with certainty tracking in 32nm CMOS Himanshu Kaul, Mark A Anders, Sanu K. Mathew, Steven Hsu, Amit Agarwal, Farhana Sheikh, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2012	42

About Mark A Anders

Mark A Anders is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Artificial Intelligence, Computer Networks and Communications and Atomic and Molecular Physics, and Optics, having authored 146 papers that have together received 3.3k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (40 papers), Semiconductor materials and devices (33 papers), Advancements in Semiconductor Devices and Circuit Design (27 papers), Physical Unclonable Functions (PUFs) and Hardware Security (18 papers), VLSI and Analog Circuit Testing (17 papers), Cryptographic Implementations and Security (17 papers), Interconnection Networks and Systems (16 papers) and Silicon Carbide Semiconductor Technologies (15 papers). The work is most often cited by research in Hardware and Architecture (1.4k citations), Electrical and Electronic Engineering (2.1k citations), Computer Vision and Pattern Recognition (449 citations), Artificial Intelligence (613 citations) and Computational Theory and Mathematics (299 citations). Mark A Anders has collaborated with scholars based in United States, Germany and Israel. Frequent co-authors include Ram Kumar Krishnamurthy, Sanu K. Mathew, Himanshu Kaul, Amit Agarwal, Shekhar Y. Borkar, Steven Hsu, Steven K. Hsu, Sudhir K. Satpathy, Farhana Sheikh and Vivek K. De. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Journal of Applied Physics, Composites Part A Applied Science and Manufacturing, Journal of Vacuum Science & Technology A Vacuum Surfaces and Films and Scientific Reports.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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