Ram Kumar Krishnamurthy

5k citations

170 papers · 3.9k · 1 hit paper · h-index 33

Impact in

Hardware and Architecture top 0.5%
- Physical Unclonable Functions (PUFs) and Hardware Security
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
Electrical and Electronic Engineering top 1%
- Low-power high-performance VLSI design
- Advanced Memory and Neural Computing

Papers in

Electrical and Electronic Engineering 128
- Low-power high-performance VLSI design 116
- Advanced Memory and Neural Computing 11
- Advanced DC-DC Converters 7
Hardware and Architecture 33
- Physical Unclonable Functions (PUFs) and Hardware Security 14
- Parallel Computing and Optimization Techniques 9
- Embedded Systems Design Techniques 7

Co-authors: Mark A Anders (92 shared papers)Sanu K. Mathew (82 shared papers)Steven K. Hsu (80 shared papers)Shekhar Y. Borkar (53 shared papers)Himanshu Kaul (67 shared papers)Amit Agarwal (60 shared papers)Sudhir K. Satpathy (29 shared papers)Gregory K. Chen (16 shared papers)
Journals: IEEE Journal of Solid-State Circuits (29 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (7 papers)IEEE Solid-State Circuits Letters (4 papers)IEEE Transactions on Circuits and Systems I Regular Papers (1 paper)IEEE Signal Processing Magazine (1 paper)
Partner nations: United States Canada Sweden

In The Last Decade

Ram Kumar Krishnamurthy

162 papers receiving 3.8k citations

Ram Kumar Krishnamurthy's Hit Papers

align trajectories log scale

16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS 2014 · 210 citations

What are hit papers?

Paper score: A paper's citations measured against the top-1% bar of its own field and year: the square root of citations ÷ bar, so 1 means right at the bar and 2 means four times its citations. The bar blends the citation counts that enter the top 1% of the paper's subfields in its year (weighted 89.5%), of those subfields over all years (0.5%) and of its year across all fields (10%); a subfield and year with fewer than 400 papers takes its year's bar. Papers from 2026 are not scored yet: in an unfinished year, when a paper appeared matters more than how it is cited.

Hit paper: A paper cited at least 1.5× the top-1% bar of its field and year: a paper score of at least √1.5.

2014 Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference

Peers

Countries citing papers authored by Ram Kumar Krishnamurthy

Since Specialization

Citations

This map shows the geographic impact of Ram Kumar Krishnamurthy's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ram Kumar Krishnamurthy with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ram Kumar Krishnamurthy more than expected).

Fields of papers citing papers by Ram Kumar Krishnamurthy

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ram Kumar Krishnamurthy. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ram Kumar Krishnamurthy. The network helps show where Ram Kumar Krishnamurthy may publish in the future.

Co-authors

The 25 scholars most cited alongside Ram Kumar Krishnamurthy, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Ram Kumar Krishnamurthy Line = papers co-authored together Ram Kumar Krishnamurthy links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 170 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference ·Sanu K. Mathew, Sudhir K. Satpathy, Mark A Anders, Himanshu Kaul, Steven K. Hsu, Amit Agarwal, Gregory K. Chen, Rachael J. Parker Hit paper breakdown →	2014	210
2	Near-threshold voltage (NTV) design Proceedings - ACM IEEE Design Automation Conference ·Himanshu Kaul, Mark A Anders, Steven K. Hsu, Amit Agarwal, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2012	184
3	A 4096-Neuron 1M-Synapse 3.8-pJ/SOP Spiking Neural Network With On-Chip STDP Learning and Sparse Weights in 10-nm FinFET CMOS IEEE Journal of Solid-State Circuits ·Gregory K. Chen, Raghavan Kumar, H. Ekin Sumbul, Phil C. Knag, Ram Kumar Krishnamurthy	2018	170
4	2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Suresh Srinivasan, Mark A Anders, Himanshu Kaul, Steven K. Hsu, Farhana Sheikh, Amit Agarwal, Sudhir K. Satpathy	2012	165
5	A sub-130-nm conditional keeper technique IEEE Journal of Solid-State Circuits ·Atila Alvandpour, Ram Kumar Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Y. Borkar	2002	162
6	340 mV–1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Sudhir K. Satpathy, Vikram Suresh, Mark A Anders, Himanshu Kaul, Amit Agarwal, Steven K. Hsu, Gregory Chen	2015	122
7	53 Gbps Native ${\rm GF}(2 ^{4}) ^{2}$ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Farhana Sheikh, Michael E. Kounavis, Shay Gueron, Steven K. Hsu, Himanshu Kaul, Mark A Anders, Ram Kumar Krishnamurthy +1 other	2011	115
8	A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS IEEE Journal of Solid-State Circuits ·Sudhir K. Satpathy, Sanu K. Mathew, Vikram Suresh, Mark A Anders, Himanshu Kaul, Steven K. Hsu, Gregory Chen, Ram Kumar Krishnamurthy	2017	102
9	DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference ·Dewei Wang, Chuan-Tung Lin, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok	2022	90
10	An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS IEEE Journal of Solid-State Circuits ·Sudhir K. Satpathy, Sanu K. Mathew, Raghavan Kumar, Vikram Suresh, Mark A Anders, Himanshu Kaul, Amit Agarwal, Steven K. Hsu	2019	87
11	$\mu $ RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Sudhir K. Satpathy, Vikram Suresh, Mark A Anders, Himanshu Kaul, Amit Agarwal, Steven K. Hsu, Gregory Chen	2016	86
12	A 4-GHz 130-nm address generation unit with 32-bit sparse-tree adder core IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Mark A Anders, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2003	80
13	An Improved Unified Scalable Radix-2 Montgomery Multiplier Proceedings/Proceedings - Symposium on Computer Arithmetic ·David Money Harris, Ram Kumar Krishnamurthy, Mark A Anders, Sanu K. Mathew, Steven K. Hsu	2005	79
14	A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Mark A Anders, B.A. Bloechel, Trang Thi Thu Nguyen, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2005	67
15	Comparison of high-performance VLSI adders in the energy-delay space IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu K. Mathew, Ram Kumar Krishnamurthy	2005	65
16	A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS IEEE Journal of Solid-State Circuits ·Himanshu Kaul, Mark A Anders, Sanu K. Mathew, Steven K. Hsu, Ram Kumar Krishnamurthy, Shekhar Y. Borkar +1 other	2009	65
17	A process variation compensating technique with an on-die leakage current sensor for nanometer scale dynamic circuits IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·C.H. Kim, Kaushik Roy, Steven K. Hsu, Ram Kumar Krishnamurthy, Shekhar Y. Borkar	2006	64
18	A 110 GOPS/W 16-bit Multiplier and Reconfigurable PLA Loop in 90-nm CMOS IEEE Journal of Solid-State Circuits ·Sanu K. Mathew, Mark A Anders, Bart R. Zeydel, Vojin G. Oklobdzija, Ram Kumar Krishnamurthy, Shekhar Y. Borkar +1 other	2005	60
19	A 130-nm 6-GHz 256 × 32 bit leakage-tolerant register file IEEE Journal of Solid-State Circuits ·Ram Kumar Krishnamurthy, Atila Alvandpour, Ganesh Balamurugan, Naresh R. Shanbhag, Krishnamurthy Soumyanath, Shekhar Y. Borkar	2002	58
20	Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations IEEE Biomedical Circuits and Systems Conference (BioCAS) ·Shihui Yin, Shreyas Kolala Venkataramanaiah, Gregory K. Chen, Ram Kumar Krishnamurthy, Yu Kevin Cao, Chaitali Chakrabarti, Jae-sun Seo	2017	50

About Ram Kumar Krishnamurthy

Ram Kumar Krishnamurthy is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Computer Networks and Communications, Artificial Intelligence and Computer Vision and Pattern Recognition, having authored 170 papers that have together received 3.9k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (116 papers), Physical Unclonable Functions (PUFs) and Hardware Security (14 papers), Interconnection Networks and Systems (13 papers), Cryptographic Implementations and Security (13 papers), Advanced Memory and Neural Computing (11 papers), Parallel Computing and Optimization Techniques (9 papers), Embedded Systems Design Techniques (7 papers) and Advanced DC-DC Converters (7 papers). The work is most often cited by research in Hardware and Architecture (1.2k citations), Electrical and Electronic Engineering (2.4k citations), Artificial Intelligence (402 citations), Computer Networks and Communications (237 citations) and Computational Theory and Mathematics (109 citations). Ram Kumar Krishnamurthy has collaborated with scholars based in United States, Canada and Sweden. Frequent co-authors include Mark A Anders, Sanu K. Mathew, Steven K. Hsu, Shekhar Y. Borkar, Himanshu Kaul, Amit Agarwal, Sudhir K. Satpathy, Gregory K. Chen, Atila Alvandpour and Krishnamurthy Soumyanath. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Solid-State Circuits Letters, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Signal Processing Magazine.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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Ram Kumar Krishnamurthy

Ram Kumar Krishnamurthy's Hit Papers

Peers

Countries citing papers authored by Ram Kumar Krishnamurthy

Fields of papers citing papers by Ram Kumar Krishnamurthy

All Works

About Ram Kumar Krishnamurthy

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