D. Murray
Impact in
- Hardware and Architecture top 2%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
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- Interconnection Networks and Systems
- Advanced Data Storage Technologies
Papers in
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- Parallel Computing and Optimization Techniques 2
- Embedded Systems Design Techniques 1
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- Low-power high-performance VLSI design 2
- 3D IC and TSV technologies 1
- Magnetic Field Sensors Techniques 1
- Advancements in PLL and VCO Technologies 1
- Co-authors
- Stephen C. Thierauf (2 shared papers)Richard T. Witek (2 shared papers)Elizabeth Cooper (2 shared papers)Andrew J. Black (2 shared papers)M. Pearce (2 shared papers)Liam Madden (2 shared papers)J. Montanaro (2 shared papers)Sribalan Santhanam (2 shared papers)
- Partner nations
- United States
In The Last Decade
D. Murray
5 papers receiving 548 citations
D. Murray's Hit Papers
Peers
Comparison fields: 5 of 24
- Hardware and Architecture 395
- Computer Networks and Communications 229
- Electrical and Electronic Engineering 428
- Biomedical Engineering 120
- Computational Theory and Mathematics 19
Countries citing papers authored by D. Murray
This map shows the geographic impact of D. Murray's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Murray with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Murray more than expected).
Fields of papers citing papers by D. Murray
This network shows the impact of papers produced by D. Murray. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Murray. The network helps show where D. Murray may publish in the future.
Co-authors
The 11 scholars most cited alongside D. Murray, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor Hit paper breakdown → | 1996 | 503 |
| 2 | 1997 | 63 | |
| 3 | 1998 | 39 | |
| 4 | 1966 | 3 | |
| 5 | SA 18.6: A LOW-Cost 300MHz RISC CPU with Attached Media Processor | 1998 | 1 |
About D. Murray
D. Murray is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Biomedical Engineering, Electronic, Optical and Magnetic Materials and Atomic and Molecular Physics, and Optics, having authored 5 papers that have together received 609 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (2 papers), Analog and Mixed-Signal Circuit Design (2 papers), Parallel Computing and Optimization Techniques (2 papers), 3D IC and TSV technologies (1 paper), Magnetic Field Sensors Techniques (1 paper), Embedded Systems Design Techniques (1 paper), Advancements in PLL and VCO Technologies (1 paper) and Magnetic properties of thin films (1 paper). The work is most often cited by research in Hardware and Architecture (395 citations), Computer Networks and Communications (229 citations), Electrical and Electronic Engineering (428 citations), Biomedical Engineering (120 citations) and Computational Theory and Mathematics (19 citations). D. Murray has collaborated with scholars based in United States. Frequent co-authors include Stephen C. Thierauf, Richard T. Witek, Elizabeth Cooper, Andrew J. Black, M. Pearce, Liam Madden, J. Montanaro, Sribalan Santhanam, J. Eno and D.W. Dobberpuhl. Their work appears in journals such as IEEE Journal of Solid-State Circuits.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.