Michael D. Ciletti

748 citations
34 papers · 473 · h-index 10

Impact in

Papers in

Michael D. Ciletti

32 papers receiving 437 citations

Peers

Michael D. Ciletti
Comparison fields: 5 of 60
  • Hardware and Architecture 250
  • Electrical and Electronic Engineering 336
  • Architecture 7
  • Media Technology 31
  • Control and Systems Engineering 71
Replace Yuichiro Shibata with:
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Bhyrav Mutnury United States
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Citations per field
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Citations per year

Countries citing papers authored by Michael D. Ciletti

Since Specialization
Citations

This map shows the geographic impact of Michael D. Ciletti's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Michael D. Ciletti with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Michael D. Ciletti more than expected).

Fields of papers citing papers by Michael D. Ciletti

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Michael D. Ciletti. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Michael D. Ciletti. The network helps show where Michael D. Ciletti may publish in the future.

Co-authors

The 18 scholars most cited alongside Michael D. Ciletti, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Michael D. Ciletti Line = papers co-authored together Michael D. Ciletti links everyone, so they are left out of the graph.

All Works

20 of 20 papers shown

Showing the 20 most-cited of 34 papers — load more, or switch the sort, to bring in the rest.

#Work
1 200275
2 199772
3
Advanced Digital Design with the Verilog HDL
201065
4 199041
5 200234
6 198929
7
Modeling, Synthesis, and Rapid Prototyping with the VERILOG HDL
199926
8 199420
9
Digital Design: With an Introduction to the Verilog HDL, VHDL and System Verilog
201815
10 197111
11
Digital Design : With an Introduction to Verilog Hdl
201310
12
Digital Design (4th Edition)
200610
13 19709
14 19917
15 19726
16 19725
17 19704
18 19894
19 19784
20 19923

About Michael D. Ciletti

Michael D. Ciletti is a scholar working on Hardware and Architecture, Media Technology, Architecture, Electrical and Electronic Engineering and Aerospace Engineering, having authored 34 papers that have together received 473 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (8 papers), Integrated Circuits and Semiconductor Failure Analysis (8 papers), Guidance and Control Systems (5 papers), Experimental Learning in Engineering (5 papers), Military Defense Systems Analysis (3 papers), Engineering Education and Pedagogy (3 papers), Quantum chaos and dynamical systems (3 papers) and Engineering Education and Curriculum Development (2 papers). The work is most often cited by research in Hardware and Architecture (250 citations), Electrical and Electronic Engineering (336 citations), Architecture (7 citations), Media Technology (31 citations) and Control and Systems Engineering (71 citations). Michael D. Ciletti has collaborated with scholars based in United States. Frequent co-authors include Weiwei Mao, Ravi K. Gulati, M. Morris Mano, Jeff Irwin, S.T. Chan, A. D. Kraus, Norman Balabanian, Theodore A. Bickart, Gregory L. Plett and A. W. Merz. Their work appears in journals such as Journal of Optimization Theory and Applications, IEEE Transactions on Automatic Control, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Automatica and IEEE Transactions on Education.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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