Mark Tehranipoor

6.9k citations
283 papers · 5.1k · 2 hit papers · h-index 35

Impact in

Papers in

Mark Tehranipoor

270 papers receiving 5.0k citations

Mark Tehranipoor's Hit Papers

LLM for SoC Security: A Paradigm Shift 2024 · 63 citations
630+3+6Years since publication100200300

Peers

Mark Tehranipoor
Comparison fields: 5 of 107
  • Hardware and Architecture 3.7k
  • Signal Processing 808
  • Electrical and Electronic Engineering 3.0k
  • Cellular and Molecular Neuroscience 870
  • Artificial Intelligence 1.3k
Replace Domenic J. Forte with:
Domenic J. Forte United States
Mohammad Tehranipoor United States
Yier Jin United States
Yiorgos Makris United States
Swarup Bhunia United States
Christian Wachsmann Germany
Siddharth Garg United States
Michael S. Hsiao United States
Debdeep Mukhopadhyay India
Patrick R. Schaumont United States
Mark Tehranipoor relative to Domenic J. Forte United States Domenic J. Forte's profile →
Citations per field
00.5×1.5×
Domenic J. Forte · 1×
Citations per year

Countries citing papers authored by Mark Tehranipoor

Since Specialization
Citations

This map shows the geographic impact of Mark Tehranipoor's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mark Tehranipoor with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mark Tehranipoor more than expected).

Fields of papers citing papers by Mark Tehranipoor

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Mark Tehranipoor. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mark Tehranipoor. The network helps show where Mark Tehranipoor may publish in the future.

Co-authors

The 25 scholars most cited alongside Mark Tehranipoor, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Mark Tehranipoor Line = papers co-authored together Mark Tehranipoor links everyone, so they are left out of the graph.

All Works

20 of 20 papers shown

Showing the 20 most-cited of 283 papers — load more, or switch the sort, to bring in the rest.

#Work
1
Hardware Trojans
Hit paper breakdown →
2016355
2 2017259
3 2016189
4 2007149
5 2017130
6 2015101
7 200699
8 201689
9 201686
10 201683
11 201781
12 201479
13 201971
14 201970
15 201565
16
LLM for SoC Security: A Paradigm Shift
Hit paper breakdown →
202463
17 202163
18 201759
19 202056
20 201756

About Mark Tehranipoor

Mark Tehranipoor is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Artificial Intelligence, Signal Processing and Cellular and Molecular Neuroscience, having authored 283 papers that have together received 5.1k indexed citations. Recurring topics across this work include Physical Unclonable Functions (PUFs) and Hardware Security (222 papers), Integrated Circuits and Semiconductor Failure Analysis (125 papers), Security and Verification in Computing (61 papers), Cryptographic Implementations and Security (53 papers), Advanced Malware Detection Techniques (49 papers), Neuroscience and Neural Engineering (45 papers), VLSI and Analog Circuit Testing (36 papers) and Advanced Memory and Neural Computing (25 papers). The work is most often cited by research in Hardware and Architecture (3.7k citations), Signal Processing (808 citations), Electrical and Electronic Engineering (3.0k citations), Cellular and Molecular Neuroscience (870 citations) and Artificial Intelligence (1.3k citations). Mark Tehranipoor has collaborated with scholars based in United States, China and France. Frequent co-authors include Domenic J. Forte, Swarup Bhunia, Bicky Shakya, Navid Asadizanjani, Yier Jin, Ujjwal Guin, Farimah Farahmandi, Xiaolin Xu, Fahim Rahman and Zimu Guo. Their work appears in journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ACM Transactions on Design Automation of Electronic Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ACM Journal on Emerging Technologies in Computing Systems and IEEE Design and Test.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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