Jiwoo Pak

1.0k citations
14 papers · 552 · 1 hit paper · h-index 10

Impact in

    • VLSI and Analog Circuit Testing
    • 3D IC and TSV technologies
    • VLSI and FPGA Design Techniques
    • Semiconductor materials and devices
    • Electronic Packaging and Soldering Technologies
    • Advanced Memory and Neural Computing
    • Advancements in Photolithography Techniques

Papers in

Jiwoo Pak

14 papers receiving 533 citations

Jiwoo Pak's Hit Papers

A graph placement methodology for fast chip design 2021 · 339 citations
3390+1+3Years since publication100200300

Peers

Jiwoo Pak
Comparison fields: 5 of 61
  • Hardware and Architecture 99
  • Electrical and Electronic Engineering 378
  • Computational Mathematics 3
  • Industrial and Manufacturing Engineering 48
  • Electronic, Optical and Magnetic Materials 78
Replace E. Tuncer with:
E. Tuncer United States
T. Higuchi Japan
Charles Chiang United States
Sujata Pandey India
Yitao Ma Japan
Takanori Isobe Japan
Chien-Ying Chen United States
Umakanta Choudhury India
Guannan Guo United States
Magdy A. El-Moursy Egypt
Jiwoo Pak relative to E. Tuncer United States E. Tuncer's profile →
Citations per field
00.5×10.3×
E. Tuncer · 1×
Citations per year

Countries citing papers authored by Jiwoo Pak

Since Specialization
Citations

This map shows the geographic impact of Jiwoo Pak's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jiwoo Pak with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jiwoo Pak more than expected).

Fields of papers citing papers by Jiwoo Pak

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jiwoo Pak. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jiwoo Pak. The network helps show where Jiwoo Pak may publish in the future.

Co-authors

The 25 scholars most cited alongside Jiwoo Pak, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Jiwoo Pak Line = papers co-authored together Jiwoo Pak links everyone, so they are left out of the graph.

All Works

14 of 14 papers shown
#Work
1
A graph placement methodology for fast chip design
Hit paper breakdown →
2021339
2 201151
3 201130
4 201224
5 201121
6 201119
7 201415
8 201511
9 201311
10 201210
11 20139
12 20244
13 20084
14 20084

About Jiwoo Pak

Jiwoo Pak is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials, Hardware and Architecture, Automotive Engineering and Sociology and Political Science, having authored 14 papers that have together received 552 indexed citations. Recurring topics across this work include 3D IC and TSV technologies (11 papers), Electronic Packaging and Soldering Technologies (7 papers), Copper Interconnects and Reliability (7 papers), VLSI and FPGA Design Techniques (3 papers), Semiconductor materials and devices (3 papers), Low-power high-performance VLSI design (2 papers), Embedded Systems Design Techniques (2 papers) and Multimedia Communication and Technology (1 paper). The work is most often cited by research in Hardware and Architecture (99 citations), Electrical and Electronic Engineering (378 citations), Computational Mathematics (3 citations), Industrial and Manufacturing Engineering (48 citations) and Electronic, Optical and Magnetic Materials (78 citations). Jiwoo Pak has collaborated with scholars based in United States and South Korea. Frequent co-authors include David Z. Pan, Sung Kyu Lim, Mohit Pathak, Azalia Mirhoseini, Richard C. Ho, R. H. S. Carpenter, Anna Goldie, James Laudon, Mustafa Ege Yazgan and Ebrahim M. Songhori. Their work appears in journals such as Nature, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Asia and South Pacific Design Automation Conference and International Conference on Computer Aided Design.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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