J. Desai
Impact in
- Hardware and Architecture top 5%
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
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- Low-power high-performance VLSI design
- Advancements in PLL and VCO Technologies
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
Papers in
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- Advancements in PLL and VCO Technologies 3
- Low-power high-performance VLSI design 2
- Co-authors
- Samuel Naffziger (2 shared papers)Tim Fischer (1 shared paper)Barry M. Doyle (1 shared paper)T. Grutkowski (1 shared paper)D. Josephson (1 shared paper)Blaine Stackhouse (1 shared paper)E. Alon (1 shared paper)Mark Horowitz (1 shared paper)
- Partner nations
- United StatesIndia
In The Last Decade
J. Desai
6 papers receiving 249 citations
Peers
Comparison fields: 5 of 23
- Hardware and Architecture 130
- Electrical and Electronic Engineering 244
- Computer Networks and Communications 50
- Human-Computer Interaction 8
- Biomedical Engineering 46
Countries citing papers authored by J. Desai
This map shows the geographic impact of J. Desai's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Desai with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Desai more than expected).
Fields of papers citing papers by J. Desai
This network shows the impact of papers produced by J. Desai. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Desai. The network helps show where J. Desai may publish in the future.
Co-authors
The 13 scholars most cited alongside J. Desai, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2005 | 140 | |
| 2 | 2005 | 110 | |
| 3 | 2009 | 14 | |
| 4 | 2017 | 12 | |
| 5 | 2011 | 2 | |
| 6 | 2018 | 1 |
About J. Desai
J. Desai is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Computer Networks and Communications, Computer Vision and Pattern Recognition and Cognitive Neuroscience, having authored 6 papers that have together received 279 indexed citations. Recurring topics across this work include Advancements in PLL and VCO Technologies (3 papers), Low-power high-performance VLSI design (2 papers), Fluid Dynamics and Heat Transfer (1 paper), Video Coding and Compression Technologies (1 paper), VLSI and Analog Circuit Testing (1 paper), Advanced Data Compression Techniques (1 paper), Interconnection Networks and Systems (1 paper) and Image and Video Quality Assessment (1 paper). The work is most often cited by research in Hardware and Architecture (130 citations), Electrical and Electronic Engineering (244 citations), Computer Networks and Communications (50 citations), Human-Computer Interaction (8 citations) and Biomedical Engineering (46 citations). J. Desai has collaborated with scholars based in United States and India. Frequent co-authors include Samuel Naffziger, Tim Fischer, Barry M. Doyle, T. Grutkowski, D. Josephson, Blaine Stackhouse, E. Alon, Mark Horowitz, Amit Kumar and Samir Patel. Their work appears in journals such as IEEE Journal of Solid-State Circuits.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.