D. Pham
Impact in
- Hardware and Architecture top 1%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
- Real-Time Systems Scheduling
- VLSI and Analog Circuit Testing
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- Interconnection Networks and Systems
Papers in
-
- Parallel Computing and Optimization Techniques 4
- Embedded Systems Design Techniques 4
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- Low-power high-performance VLSI design 4
- VLSI and FPGA Design Techniques 1
- Co-authors
- D. Wendel (4 shared papers)James N. Warnock (4 shared papers)Kazuaki Yazawa (3 shared papers)S. Weitzel (3 shared papers)Charles Johns (3 shared papers)H. Peter Hofstee (3 shared papers)J. Kahle (3 shared papers)Yoshio Masubuchi (3 shared papers)
- Journals
- IEEE Journal of Solid-State Circuits (2 papers)IEEE Custom Integrated Circuits Conference (CICC) (1 paper)Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference (2 papers)
- Partner nations
- United StatesJapanGermany
In The Last Decade
D. Pham
7 papers receiving 604 citations
D. Pham's Hit Papers
Peers
Comparison fields: 5 of 33
- Hardware and Architecture 424
- Computer Networks and Communications 131
- Electrical and Electronic Engineering 138
- Computer Graphics and Computer-Aided Design 10
- Computational Theory and Mathematics 24
Countries citing papers authored by D. Pham
This map shows the geographic impact of D. Pham's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Pham with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Pham more than expected).
Fields of papers citing papers by D. Pham
This network shows the impact of papers produced by D. Pham. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Pham. The network helps show where D. Pham may publish in the future.
Co-authors
The 21 scholars most cited alongside D. Pham, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | The design and implementation of a first-generation CELL processor Hit paper breakdown → | 2005 | 397 |
| 2 | 2005 | 179 | |
| 3 | 2005 | 24 | |
| 4 | 2006 | 14 | |
| 5 | 2002 | 11 | |
| 6 | 2006 | 10 | |
| 7 | 2002 | 6 |
About D. Pham
D. Pham is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computer Networks and Communications, Nuclear Energy and Engineering and Waste Management and Disposal, having authored 7 papers that have together received 641 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (4 papers), Parallel Computing and Optimization Techniques (4 papers), Embedded Systems Design Techniques (4 papers), VLSI and FPGA Design Techniques (1 paper) and Interconnection Networks and Systems (1 paper). The work is most often cited by research in Hardware and Architecture (424 citations), Computer Networks and Communications (131 citations), Electrical and Electronic Engineering (138 citations), Computer Graphics and Computer-Aided Design (10 citations) and Computational Theory and Mathematics (24 citations). D. Pham has collaborated with scholars based in United States, Japan and Germany. Frequent co-authors include D. Wendel, James N. Warnock, Kazuaki Yazawa, S. Weitzel, Charles Johns, H. Peter Hofstee, J. Kahle, Yoshio Masubuchi, M. Riley and M. Suzuoki. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Custom Integrated Circuits Conference (CICC) and Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.