Barış Taşkın

1.1k citations

142 papers · 794 · h-index 13

Impact in

Electrical and Electronic Engineering top 5%
- Low-power high-performance VLSI design
- VLSI and FPGA Design Techniques
- 3D IC and TSV technologies
- Radio Frequency Integrated Circuit Design
- Advancements in PLL and VCO Technologies
Hardware and Architecture top 10%
- Parallel Computing and Optimization Techniques

Papers in

Electrical and Electronic Engineering 111
- Low-power high-performance VLSI design 72
- VLSI and FPGA Design Techniques 58
- Radio Frequency Integrated Circuit Design 17
- 3D IC and TSV technologies 12
- Advancements in PLL and VCO Technologies 8
Computer Networks and Communications 25
- Interconnection Networks and Systems 22

Co-authors: Ivan S. Kourtev (15 shared papers)Bo Hong (2 shared papers)Ying Yuan Teng (11 shared papers)Emre Salman (9 shared papers)Mark Hempstead (9 shared papers)Kapil Ramesh Dandekar (8 shared papers)Yuqiao Liu (8 shared papers)Weicheng Liu (6 shared papers)
Journals: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (11 papers)IEEE Transactions on Circuits and Systems I Regular Papers (3 papers)ACM Transactions on Design Automation of Electronic Systems (3 papers)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (3 papers)ACM Journal on Emerging Technologies in Computing Systems (2 papers)
Partner nations: United States Türkiye Japan

In The Last Decade

Barış Taşkın

131 papers receiving 770 citations

Peers

Countries citing papers authored by Barış Taşkın

Since Specialization

Citations

This map shows the geographic impact of Barış Taşkın's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Barış Taşkın with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Barış Taşkın more than expected).

Fields of papers citing papers by Barış Taşkın

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Barış Taşkın. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Barış Taşkın. The network helps show where Barış Taşkın may publish in the future.

Co-authors

The 25 scholars most cited alongside Barış Taşkın, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Barış Taşkın Line = papers co-authored together Barış Taşkın links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 142 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Improving Line-Based QCA Memory Cell Design Through Dual Phase Clocking IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Barış Taşkın, Bo Hong	2008	49
2	Synchrotrace: synchronization-aware architecture-agnostic traces for light-weight multicore simulation IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) ·Siddharth Nilakantan, Karthik Sangaiah, Ankit More, Giordano Salvadory, Barış Taşkın, Mark Hempstead	2015	22
3	TSV Antennas for Multi-Band Wireless Communication IEEE Journal on Emerging and Selected Topics in Circuits and Systems ·Vasil Pano, İbrahim Tekin, Isikcan Yilmaz, Yuqiao Liu, Kapil Ramesh Dandekar, Barış Taşkın	2020	22
4	Delay insertion method in clock skew scheduling IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Barış Taşkın, Ivan S. Kourtev	2006	21
5	Timing Optimization Through Clock Skew Scheduling Springer eBooks ·Ivan S. Kourtev, Eby G. Friedman, Barış Taşkın	2008	20
6	Post-CTS clock skew scheduling with limited delay buffering Conference proceedings ·Jianchao Lu, Barış Taşkın	2009	16
7	From RTL to GDSII: An ASIC design course development using Synopsys® University Program Jianchao Lu, Barış Taşkın	2011	16
8	Design Methodology for Voltage-Scaled Clock Distribution Networks IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Can Sitik, Weicheng Liu, Barış Taşkın, Emre Salman	2016	16
9	Interconnects for DNA, Quantum, In-Memory, and Optical Computing: Insights From a Panel Discussion IEEE Micro ·Amlan Ganguly, Sergi Abadal, Ishan G Thakkar, Natalie Enright Jerger, Marc D. Riedel, Masoud Babaie, Rajeev Balasubramonian, Abu Sebastian	2022	15
10	Steiner tree based rotary clock routing with bounded skew and capacitive load balancing Design, Automation, and Test in Europe ·Jianchao Lu, Vinayak Honkote, Xin Chen, Barış Taşkın	2011	14
11	Clock mesh synthesis with gated local trees and activity driven register clustering Jianchao Lu, Xiaomi Mao, Barış Taşkın	2012	13
12	FinFET-Based Low-Swing Clocking ACM Journal on Emerging Technologies in Computing Systems ·Can Sitik, Emre Salman, Leo Filippini, Sung Jun Yoon, Barış Taşkın	2015	13
13	Innovative propagation mechanism for inter-chip and intra-chip communication IEEE Wireless and Microwave Technology Conference (WAMICON) ·Yuqiao Liu, Vasil Pano, Damiano Patron, Kapil Ramesh Dandekar, Barış Taşkın	2015	13
14	Timing-Driven Physical Design for VLSI Circuits Using Resonant Rotary Clocking Conference proceedings ·Barış Taşkın, Ivan S. Kourtev +1 other	2006	12
15	CROA: Design and Analysis of the Custom Rotary Oscillatory Array IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Vinayak Honkote, Barış Taşkın	2010	12
16	SLECTS: Slew-Driven Clock Tree Synthesis IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Weicheng Liu, Can Sitik, Emre Salman, Barış Taşkın, Savithri Sundareswaran +1 other	2019	12
17	Resonant Clock Synchronization With Active Silicon Interposer for Multi-Die Systems IEEE Transactions on Circuits and Systems I Regular Papers ·Ragh Kuttappa, Barış Taşkın, Vasil Pano +1 other	2021	12
18	Custom topology rotary clock router with tree subnetworks ACM Transactions on Design Automation of Electronic Systems ·Barış Taşkın, Owen Farell, Michael Hazeltine, Ryan Ketner +1 other	2009	11
19	Clock buffer polarity assignment considering capacitive load International Symposium on Quality Electronic Design (ISQED) ·Jianchao Lu, Barış Taşkın	2010	11
20	Integrated Clock Mesh Synthesis With Incremental Register Placement IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Jianchao Lu, Xiaomi Mao, Barış Taşkın	2012	11

About Barış Taşkın

Barış Taşkın is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications, Hardware and Architecture, Biomedical Engineering and Computational Theory and Mathematics, having authored 142 papers that have together received 794 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (72 papers), VLSI and FPGA Design Techniques (58 papers), Interconnection Networks and Systems (22 papers), Radio Frequency Integrated Circuit Design (17 papers), 3D IC and TSV technologies (12 papers), Analog and Mixed-Signal Circuit Design (10 papers), Advancements in PLL and VCO Technologies (8 papers) and Parallel Computing and Optimization Techniques (6 papers). The work is most often cited by research in Electrical and Electronic Engineering (544 citations), Hardware and Architecture (74 citations), Computer Networks and Communications (143 citations), Computational Theory and Mathematics (67 citations) and Architecture (11 citations). Barış Taşkın has collaborated with scholars based in United States, Türkiye and Japan. Frequent co-authors include Ivan S. Kourtev, Bo Hong, Ying Yuan Teng, Emre Salman, Mark Hempstead, Kapil Ramesh Dandekar, Yuqiao Liu, Weicheng Liu, İbrahim Tekin and Eby G. Friedman. Their work appears in journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Circuits and Systems I Regular Papers, ACM Transactions on Design Automation of Electronic Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM Journal on Emerging Technologies in Computing Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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