S. Dey
Impact in
- Hardware and Architecture top 0.2%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- Computer Networks and Communications top 0.5%
- Interconnection Networks and Systems
Papers in
-
- VLSI and Analog Circuit Testing 56
- Embedded Systems Design Techniques 42
- Parallel Computing and Optimization Techniques 16
-
- Integrated Circuits and Semiconductor Failure Analysis 33
- Low-power high-performance VLSI design 29
- VLSI and FPGA Design Techniques 26
- Radiation Effects in Electronics 21
- Co-authors
- Anand Raghunathan (35 shared papers)Kanishka Lahiri (17 shared papers)D. Panigrahi (8 shared papers)Erik Jan Marinissen (2 shared papers)Y. Zorian (3 shared papers)Li Chen (5 shared papers)Niraj K. Jha (15 shared papers)Arijit Mukherjee (18 shared papers)
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (22 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (7 papers)Computer (1 paper)IEEE Transactions on Mobile Computing (1 paper)IEEE Network (1 paper)
- Partner nations
- United StatesIndiaJapan
In The Last Decade
S. Dey
133 papers receiving 3.2k citations
S. Dey's Hit Papers
Peers
Comparison fields: 5 of 83
- Hardware and Architecture 2.3k
- Computer Networks and Communications 1.4k
- Electrical and Electronic Engineering 2.3k
- Software 127
- Computer Vision and Pattern Recognition 216
Countries citing papers authored by S. Dey
This map shows the geographic impact of S. Dey's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Dey with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Dey more than expected).
Fields of papers citing papers by S. Dey
This network shows the impact of papers produced by S. Dey. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Dey. The network helps show where S. Dey may publish in the future.
Co-authors
The 25 scholars most cited alongside S. Dey, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
Showing the 20 most-cited of 140 papers — load more, or switch the sort, to bring in the rest.
| # | Work | ||
|---|---|---|---|
| 1 | Testing embedded-core based system chips Hit paper breakdown → | 2002 | 299 |
| 2 | 2002 | 232 | |
| 3 | 2003 | 183 | |
| 4 | 2002 | 181 | |
| 5 | 2001 | 165 | |
| 6 | 1999 | 160 | |
| 7 | 2001 | 135 | |
| 8 | 2003 | 113 | |
| 9 | 2004 | 94 | |
| 10 | 2004 | 85 | |
| 11 | 2002 | 82 | |
| 12 | 2002 | 74 | |
| 13 | 2008 | 52 | |
| 14 | 2005 | 51 | |
| 15 | 2002 | 50 | |
| 16 | 2002 | 45 | |
| 17 | 2002 | 43 | |
| 18 | 2004 | 40 | |
| 19 | 2014 | 39 | |
| 20 | 2016 | 38 |
About S. Dey
S. Dey is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computer Networks and Communications, Computer Vision and Pattern Recognition and Artificial Intelligence, having authored 140 papers that have together received 3.5k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (56 papers), Embedded Systems Design Techniques (42 papers), Integrated Circuits and Semiconductor Failure Analysis (33 papers), Low-power high-performance VLSI design (29 papers), VLSI and FPGA Design Techniques (26 papers), Radiation Effects in Electronics (21 papers), Interconnection Networks and Systems (19 papers) and Parallel Computing and Optimization Techniques (16 papers). The work is most often cited by research in Hardware and Architecture (2.3k citations), Computer Networks and Communications (1.4k citations), Electrical and Electronic Engineering (2.3k citations), Software (127 citations) and Computer Vision and Pattern Recognition (216 citations). S. Dey has collaborated with scholars based in United States, India and Japan. Frequent co-authors include Anand Raghunathan, Kanishka Lahiri, D. Panigrahi, Erik Jan Marinissen, Y. Zorian, Li Chen, Niraj K. Jha, Arijit Mukherjee, Faraydon Karim and Anh Nguyen. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Computer, IEEE Transactions on Mobile Computing and IEEE Network.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.