R. Mehra
Impact in
- Hardware and Architecture top 2%
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
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- Low-power high-performance VLSI design
- VLSI and FPGA Design Techniques
Papers in
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- Embedded Systems Design Techniques 5
- Parallel Computing and Optimization Techniques 5
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- Low-power high-performance VLSI design 5
- VLSI and FPGA Design Techniques 3
- Sensorless Control of Electric Motors 1
- HVDC Systems and Fault Protection 1
- Co-authors
- Jan M. Rabaey (4 shared papers)Anantha P. Chandrakasan (1 shared paper)R.W. Brodersen (1 shared paper)Miodrag Potkonjak (1 shared paper)L.M. Guerra (3 shared papers)Bernd Wurth (1 shared paper)Norbert Wehn (1 shared paper)P. Landman (1 shared paper)
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)IEEE Journal of Solid-State Circuits (1 paper)Mathematical Modelling (1 paper)IIASA PURE (International Institute of Applied Systems Analysis) (1 paper)IEEE Design & Test of Computers (1 paper)
- Partner nations
- United StatesGermany
In The Last Decade
R. Mehra
10 papers receiving 402 citations
Peers
Comparison fields: 5 of 33
- Hardware and Architecture 321
- Electrical and Electronic Engineering 332
- Computer Networks and Communications 110
- Signal Processing 47
- Computational Theory and Mathematics 28
Countries citing papers authored by R. Mehra
This map shows the geographic impact of R. Mehra's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R. Mehra with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R. Mehra more than expected).
Fields of papers citing papers by R. Mehra
This network shows the impact of papers produced by R. Mehra. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R. Mehra. The network helps show where R. Mehra may publish in the future.
Co-authors
The 14 scholars most cited alongside R. Mehra, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 1995 | 344 | |
| 2 | 2000 | 47 | |
| 3 | 1997 | 29 | |
| 4 | 1996 | 15 | |
| 5 | 2002 | 9 | |
| 6 | 1976 | 9 | |
| 7 | 1983 | 2 | |
| 8 | 2002 | 2 | |
| 9 | 2002 | 1 | |
| 10 | 2001 | 1 |
About R. Mehra
R. Mehra is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computer Networks and Communications, Control and Systems Engineering and Computational Theory and Mathematics, having authored 10 papers that have together received 459 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (5 papers), Embedded Systems Design Techniques (5 papers), Parallel Computing and Optimization Techniques (5 papers), VLSI and FPGA Design Techniques (3 papers), Interconnection Networks and Systems (2 papers), Hydraulic and Pneumatic Systems (1 paper), Sensorless Control of Electric Motors (1 paper) and HVDC Systems and Fault Protection (1 paper). The work is most often cited by research in Hardware and Architecture (321 citations), Electrical and Electronic Engineering (332 citations), Computer Networks and Communications (110 citations), Signal Processing (47 citations) and Computational Theory and Mathematics (28 citations). R. Mehra has collaborated with scholars based in United States and Germany. Frequent co-authors include Jan M. Rabaey, Anantha P. Chandrakasan, R.W. Brodersen, Miodrag Potkonjak, L.M. Guerra, Bernd Wurth, Norbert Wehn, P. Landman, Sharad Malik and R. Rouhani. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Journal of Solid-State Circuits, Mathematical Modelling, IIASA PURE (International Institute of Applied Systems Analysis) and IEEE Design & Test of Computers.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.