K. Aingaran
Impact in
- Hardware and Architecture top 1%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
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- Interconnection Networks and Systems
- Advanced Data Storage Technologies
- Distributed systems and fault tolerance
Papers in
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- Low-power high-performance VLSI design 5
- VLSI and FPGA Design Techniques 2
- Electromagnetic Compatibility and Noise Suppression 1
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- VLSI and Analog Circuit Testing 2
- Parallel Computing and Optimization Techniques 2
- Co-authors
- Poonacha Kongetira (1 shared paper)Kunle Olukotun (1 shared paper)S. Bobba (2 shared papers)F. Klass (2 shared papers)Cong Nam Truong (1 shared paper)Anup Das (1 shared paper)Gin Yee (1 shared paper)R. Heald (1 shared paper)
- Journals
- IEEE Micro (2 papers)IEEE Journal of Solid-State Circuits (1 paper)International Conference on Computer Aided Design (1 paper)
- Partner nations
- United StatesUnited Kingdom
In The Last Decade
K. Aingaran
8 papers receiving 943 citations
K. Aingaran's Hit Papers
Peers
Comparison fields: 5 of 40
- Hardware and Architecture 748
- Computer Networks and Communications 667
- Electrical and Electronic Engineering 451
- Information Systems 97
- Computer Graphics and Computer-Aided Design 12
Countries citing papers authored by K. Aingaran
This map shows the geographic impact of K. Aingaran's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Aingaran with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Aingaran more than expected).
Fields of papers citing papers by K. Aingaran
This network shows the impact of papers produced by K. Aingaran. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Aingaran. The network helps show where K. Aingaran may publish in the future.
Co-authors
The 13 scholars most cited alongside K. Aingaran, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | Niagara: A 32-Way Multithreaded Sparc Processor Hit paper breakdown → | 2005 | 775 |
| 2 | 1999 | 115 | |
| 3 | 2001 | 46 | |
| 4 | 2002 | 41 | |
| 5 | 2015 | 30 | |
| 6 | 2002 | 17 | |
| 7 | 2016 | 7 | |
| 8 | 2002 | 2 |
About K. Aingaran
K. Aingaran is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Computer Networks and Communications, Biomedical Engineering and Automotive Engineering, having authored 8 papers that have together received 1.0k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (5 papers), VLSI and Analog Circuit Testing (2 papers), VLSI and FPGA Design Techniques (2 papers), Parallel Computing and Optimization Techniques (2 papers), Analog and Mixed-Signal Circuit Design (2 papers), Advanced Battery Technologies Research (1 paper), Cloud Computing and Resource Management (1 paper) and Electromagnetic Compatibility and Noise Suppression (1 paper). The work is most often cited by research in Hardware and Architecture (748 citations), Computer Networks and Communications (667 citations), Electrical and Electronic Engineering (451 citations), Information Systems (97 citations) and Computer Graphics and Computer-Aided Design (12 citations). K. Aingaran has collaborated with scholars based in United States and United Kingdom. Frequent co-authors include Poonacha Kongetira, Kunle Olukotun, S. Bobba, F. Klass, Cong Nam Truong, Anup Das, Gin Yee, R. Heald, Z. Radović and Serena Leung. Their work appears in journals such as IEEE Micro, IEEE Journal of Solid-State Circuits and International Conference on Computer Aided Design.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.