John Lillis

1.5k citations

49 papers · 1.1k · h-index 19

Impact in

Hardware and Architecture top 1%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
Electrical and Electronic Engineering top 5%
- VLSI and FPGA Design Techniques
- Low-power high-performance VLSI design
- 3D IC and TSV technologies
- Advancements in Photolithography Techniques

Papers in

Electrical and Electronic Engineering 49
- VLSI and FPGA Design Techniques 45
- Low-power high-performance VLSI design 34
- 3D IC and TSV technologies 2
Hardware and Architecture 38
- VLSI and Analog Circuit Testing 24
- Embedded Systems Design Techniques 13
- Parallel Computing and Optimization Techniques 5

Co-authors: Chung‐Kuan Cheng (12 shared papers)Tao Lin (3 shared papers)Ting-Ting Y. Lin (4 shared papers)Shen Lin (1 shared paper)Ching-Yen Ho (1 shared paper)Ashok Jagannathan (4 shared papers)Chung-Kuan Cheng (3 shared papers)Marco D. Santambrogio (2 shared papers)
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (6 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1 paper)IEEE Journal of Solid-State Circuits (1 paper)ACM Transactions on Design Automation of Electronic Systems (1 paper)VLSI design (1 paper)
Partner nations: United States Italy Germany

In The Last Decade

John Lillis

49 papers receiving 1.1k citations

Peers

Countries citing papers authored by John Lillis

Since Specialization

Citations

This map shows the geographic impact of John Lillis's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by John Lillis with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites John Lillis more than expected).

Fields of papers citing papers by John Lillis

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by John Lillis. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by John Lillis. The network helps show where John Lillis may publish in the future.

Co-authors

The 24 scholars most cited alongside John Lillis, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with John Lillis Line = papers co-authored together John Lillis links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 49 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Optimal wire sizing and buffer insertion for low power and a generalized delay model IEEE Journal of Solid-State Circuits ·John Lillis, Chung‐Kuan Cheng, Tao Lin	1996	196
2	Mongrel: hybrid techniques for standard cell placement International Conference on Computer Aided Design ·Sung Woo Hur, John Lillis	2000	107
3	New performance driven routing techniques with explicit area/delay tradeoff and simultaneous wire sizing John Lillis, Chung‐Kuan Cheng, Ting-Ting Y. Lin, Ching-Yen Ho	1996	87
4	Optimal wire sizing and buffer insertion for low power and a generalized delay model International Conference on Computer Aided Design ·John Lillis, Chung‐Kuan Cheng, Ting-Ting Y. Lin	1995	82
5	Buffered Steiner trees for difficult instances Charles J. Alpert, Miloš Hrkić, Jiang Hu, Andrew B. Kahng, John Lillis, B. Liu, Stephen T. Quay, Sachin S. Sapatnekar, Andrew Sullivan, Paul G. Villarrubia	2001	46
6	Interconnect Analysis and Synthesis John Wiley & Sons, Inc. eBooks ·Shen Lin, John Lillis	1999	45
7	Simultaneous routing and buffer insertion for high performance interconnect John Lillis, Chung‐Kuan Cheng, Ting-Ting Y. Lin	2002	40
8	Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Marco Rabozzi, Gianluca Durelli, Antonio Miele, John Lillis, Marco D. Santambrogio	2016	31
9	Timing optimization of FPGA placements by logic replication Giancarlo Beraudo, John Lillis	2003	30
10	Linear decomposition algorithm for VLSI design applications International Conference on Computer Aided Design ·Jianmin Li, John Lillis, Chung‐Kuan Cheng	1995	28
11	An approach to placement-coupled logic replication Miloš Hrkić, John Lillis, Giancarlo Beraudo	2004	27
12	S-Tree Proceedings - ACM IEEE Design Automation Conference ·Miloš Hrkić, John Lillis	2002	27
13	Relaxation and clustering in a local search framework Sung-Woo Hur, John Lillis	1999	25
14	Timing-driven maze routing IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Sung-Woo Hur, Ashok Jagannathan, John Lillis	2000	23
15	Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space Jianhua Liu, Yi Zhu, Haikun Zhu, Chung‐Kuan Cheng, John Lillis	2007	23
16	Buffer tree synthesis with consideration of temporal locality, sink polarity requirements, solution cost and blockages Miloš Hrkić, John Lillis	2002	21
17	Timing optimization for multisource nets: characterization and optimal repeater insertion IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·John Lillis, Chung-Kuan Cheng	1999	19
18	Floorplanning for Partially-Reconfigurable FPGA Systems via Mixed-Integer Linear Programming Virtual Community of Pathological Anatomy (University of Castilla La Mancha) ·Marco Rabozzi, John Lillis, Marco D. Santambrogio	2014	19
19	An LP-based methodology for improved timing-driven placement Qingzhou Wang, John Lillis, Shubhankar Sanyal	2005	18
20	A fast algorithm for context-aware buffer insertion Ashok Jagannathan, Sung-Woo Hur, John Lillis	2000	18

About John Lillis

John Lillis is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Computer Networks and Communications, Industrial and Manufacturing Engineering and Computational Theory and Mathematics, having authored 49 papers that have together received 1.1k indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (45 papers), Low-power high-performance VLSI design (34 papers), VLSI and Analog Circuit Testing (24 papers), Interconnection Networks and Systems (18 papers), Embedded Systems Design Techniques (13 papers), Parallel Computing and Optimization Techniques (5 papers), 3D IC and TSV technologies (2 papers) and Manufacturing Process and Optimization (2 papers). The work is most often cited by research in Hardware and Architecture (766 citations), Electrical and Electronic Engineering (1.1k citations), Computer Networks and Communications (288 citations), Computational Theory and Mathematics (40 citations) and Software (10 citations). John Lillis has collaborated with scholars based in United States, Italy and Germany. Frequent co-authors include Chung‐Kuan Cheng, Tao Lin, Ting-Ting Y. Lin, Shen Lin, Ching-Yen Ho, Ashok Jagannathan, Chung-Kuan Cheng, Marco D. Santambrogio, Jianmin Li and Antonio Miele. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Journal of Solid-State Circuits, ACM Transactions on Design Automation of Electronic Systems and VLSI design.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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