Jayesh Gaur

490 citations
20 papers · 401 · h-index 11

Impact in

Papers in

Journals
ACM Transactions on Architecture and Code Optimization (1 paper)Proceedings - International Symposium on Computer Architecture/Proceedings (3 papers)ACM/IEEE International Symposium on Computer Architecture (ISCA) (6 papers)ACM SIGARCH Computer Architecture News (2 papers)Technical digest - International Electron Devices Meeting/Technical digest (1 paper)
Partner nations
United StatesIndiaTaiwan

In The Last Decade

Jayesh Gaur

20 papers receiving 392 citations

Peers

Jayesh Gaur
Comparison fields: 5 of 12
  • Hardware and Architecture 351
  • Computer Networks and Communications 38
  • Artificial Intelligence 27
  • Electrical and Electronic Engineering 36
  • Atomic and Molecular Physics, and Optics 9
Replace Yingying Tian with:
Yingying Tian United States
Ashley Saulsbury Sweden
Stefan Steinke Germany
Anil Krishna United States
Mark Gebhart United States
Vinodh Cuppu United States
Lars Wehmeyer Germany
Rei-Fu Huang Taiwan
Sai Prashanth Muralidhara United States
Gurgen Harutyunyan United States
Jayesh Gaur relative to Yingying Tian United States Yingying Tian's profile →
Citations per field
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Yingying Tian · 1×
Citations per year

Countries citing papers authored by Jayesh Gaur

Since Specialization
Citations

This map shows the geographic impact of Jayesh Gaur's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jayesh Gaur with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jayesh Gaur more than expected).

Fields of papers citing papers by Jayesh Gaur

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jayesh Gaur. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jayesh Gaur. The network helps show where Jayesh Gaur may publish in the future.

Co-authors

The 25 scholars most cited alongside Jayesh Gaur, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Jayesh Gaur Line = papers co-authored together Jayesh Gaur links everyone, so they are left out of the graph.

All Works

20 of 20 papers shown
#Work
1 201185
2 201250
3 201843
4 201136
5 201828
6 201624
7 201321
8 202121
9 202120
10 201616
11 201911
12 20179
13 20209
14 20227
15 20206
16 20175
17 20175
18 20192
19 20242
20 20221

About Jayesh Gaur

Jayesh Gaur is a scholar working on Hardware and Architecture, Computer Networks and Communications, Electrical and Electronic Engineering, Artificial Intelligence and Nuclear Energy and Engineering, having authored 20 papers that have together received 401 indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (18 papers), Low-power high-performance VLSI design (2 papers), Security and Verification in Computing (1 paper) and Interconnection Networks and Systems (1 paper). The work is most often cited by research in Hardware and Architecture (351 citations), Computer Networks and Communications (38 citations), Artificial Intelligence (27 citations), Electrical and Electronic Engineering (36 citations) and Atomic and Molecular Physics, and Optics (9 citations). Jayesh Gaur has collaborated with scholars based in United States, India and Taiwan. Frequent co-authors include Sreenivas Subramoney, Mainak Chaudhuri, Alaa R. Alameldeen, Hong Wang, Tanay Karnik, Huichu Liu, Ian A. Young, Jason Lowe-Power, Steven Swanson and Hong Wang. Their work appears in journals such as ACM Transactions on Architecture and Code Optimization, Proceedings - International Symposium on Computer Architecture/Proceedings, ACM/IEEE International Symposium on Computer Architecture (ISCA), ACM SIGARCH Computer Architecture News and Technical digest - International Electron Devices Meeting/Technical digest.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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