Hyun-Jun Yoon
Impact in
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- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
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- Advanced Data Storage Technologies
- Caching and Content Delivery
- Error Correcting Code Techniques
Papers in
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- VLSI and Analog Circuit Testing 3
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- Integrated Circuits and Semiconductor Failure Analysis 3
- VLSI and FPGA Design Techniques 1
- Co-authors
- Jin-Man Han (1 shared paper)Jaeyong Jeong (1 shared paper)Kye-Hyun Kyung (1 shared paper)Myung-Hoon Choi (1 shared paper)Taeyoung Kim (1 shared paper)Young-Hyun Jun (1 shared paper)Seung Hwan Shin (1 shared paper)Kitae Park (1 shared paper)
- Journals
- Advanced Science (1 paper)Applied Sciences (1 paper)대한전자공학회 ISOCC (2 papers)Journal of Welding and Joining (1 paper)
- Partner nations
- South Korea
In The Last Decade
Hyun-Jun Yoon
5 papers receiving 47 citations
Peers
Comparison fields: 5 of 25
- Hardware and Architecture 16
- Computer Networks and Communications 32
- Computational Theory and Mathematics 14
- Biological Psychiatry 1
- Sensory Systems 2
Countries citing papers authored by Hyun-Jun Yoon
This map shows the geographic impact of Hyun-Jun Yoon's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Hyun-Jun Yoon with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Hyun-Jun Yoon more than expected).
Fields of papers citing papers by Hyun-Jun Yoon
This network shows the impact of papers produced by Hyun-Jun Yoon. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Hyun-Jun Yoon. The network helps show where Hyun-Jun Yoon may publish in the future.
Co-authors
The 25 scholars most cited alongside Hyun-Jun Yoon, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2012 | 33 | |
| 2 | 2023 | 8 | |
| 3 | 2008 | 4 | |
| 4 | 2025 | 3 | |
| 5 | An Efficient BIST Architecture for Embedded Dual-Port Memories | 2007 | 1 |
| 6 | LFSR Reseeding Methodology for Low Power and Deterministic Pattern | 2007 | 1 |
| 7 | 2013 | 0 |
About Hyun-Jun Yoon
Hyun-Jun Yoon is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Physiology, Computer Networks and Communications and Civil and Structural Engineering, having authored 7 papers that have together received 50 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (3 papers), Integrated Circuits and Semiconductor Failure Analysis (3 papers), Phytochemicals and Antioxidant Activities (1 paper), Alzheimer's disease research and treatments (1 paper), VLSI and FPGA Design Techniques (1 paper), Engineering and Test Systems (1 paper), Welding Techniques and Residual Stresses (1 paper) and Advanced Data Storage Technologies (1 paper). The work is most often cited by research in Hardware and Architecture (16 citations), Computer Networks and Communications (32 citations), Computational Theory and Mathematics (14 citations), Biological Psychiatry (1 citation) and Sensory Systems (2 citations). Hyun-Jun Yoon has collaborated with scholars based in South Korea. Frequent co-authors include Jin-Man Han, Jaeyong Jeong, Kye-Hyun Kyung, Myung-Hoon Choi, Taeyoung Kim, Young-Hyun Jun, Seung Hwan Shin, Kitae Park, Hyunwook Park and Mi‐Sun Kim. Their work appears in journals such as Advanced Science, Applied Sciences, 대한전자공학회 ISOCC and Journal of Welding and Joining.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.