Farzan Fallah

2.1k citations

53 papers · 1.4k · h-index 21

Impact in

Hardware and Architecture top 1%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
Software top 2%
- Software Testing and Debugging Techniques

Papers in

Hardware and Architecture 39
- Embedded Systems Design Techniques 20
- VLSI and Analog Circuit Testing 18
- Parallel Computing and Optimization Techniques 16
Electrical and Electronic Engineering 44
- Low-power high-performance VLSI design 37
- Advancements in Semiconductor Devices and Circuit Design 12
- Radiation Effects in Electronics 8
- VLSI and FPGA Design Techniques 7

Co-authors: Massoud Pedram (23 shared papers)Srinivas Devadas (7 shared papers)Afshin Abdollahi (6 shared papers)Kurt Keutzer (5 shared papers)Behnam Amelifard (7 shared papers)Ryan Kastner (8 shared papers)Pranav N Ashar (2 shared papers)Subhasish Mitra (4 shared papers)
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (8 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (5 papers)IEICE Transactions on Electronics (1 paper)Journal of Circuits Systems and Computers (1 paper)Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design (2 papers)
Partner nations: United States Japan Switzerland

In The Last Decade

Farzan Fallah

53 papers receiving 1.3k citations

Peers

Countries citing papers authored by Farzan Fallah

Since Specialization

Citations

This map shows the geographic impact of Farzan Fallah's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Farzan Fallah with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Farzan Fallah more than expected).

Fields of papers citing papers by Farzan Fallah

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Farzan Fallah. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Farzan Fallah. The network helps show where Farzan Fallah may publish in the future.

Co-authors

The 25 scholars most cited alongside Farzan Fallah, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Farzan Fallah Line = papers co-authored together Farzan Fallah links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 53 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Leakage current reduction in CMOS VLSI circuits by input vector control IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Afshin Abdollahi, Farzan Fallah, Massoud Pedram	2004	207
2	Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits IEICE Transactions on Electronics ·Farzan Fallah	2005	203
3	OCCOM Farzan Fallah, Srinivas Devadas, Kurt Keutzer	1998	79
4	Functional vector generation for HDL models using linear programming and 3-satisfiability Farzan Fallah, Srinivas Devadas, Kurt Keutzer	1998	77
5	Simulation vector generation from HDL descriptions for observability-enhanced statement coverage Farzan Fallah, Pranav N Ashar, Srinivas Devadas	1999	70
6	OCCOM-efficient computation of observability-based code coverage metrics for functional verification IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Farzan Fallah, Srinivas Devadas, Kurt Keutzer	2001	52
7	Leakage Minimization of SRAM Cells in a Dual-$V_t$ and Dual-$T_{\rm ox}$ Technology IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Behnam Amelifard, Farzan Fallah, Massoud Pedram	2008	51
8	A Robust Power Gating Structure and Power Mode Transition Strategy for MTCMOS Design IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Afshin Abdollahi, Farzan Fallah, Massoud Pedram	2007	48
9	A functional validation technique: biased-random simulation guided by observability-based coverage Serdar Taşiran, Farzan Fallah, David Chinnery, S. Weber, Kurt Keutzer	2002	43
10	Irredundant address bus encoding for low power Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram	2001	41
11	Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class of Low-Power High-Performance Adders Behnam Amelifard, Farzan Fallah, Massoud Pedram	2005	39
12	Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·David C. Lin, Ted Hong, Yanjing Li, S. Eswaran, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner, Subhasish Mitra	2014	38
13	Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Anup Hosangadi, Farzan Fallah, Ryan Kastner	2006	35
14	Combinational Logic Design Using Six-Terminal NEM Relays IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Daesung Lee, W. S. Lee, Chen Chen, Farzan Fallah, J. Provine, Soogine Chong, J. Watkins, Roger T. Howe, H.‐S. Philip Wong, Subhasish Mitra	2013	30
15	Functional vector generation for HDL models using linear programming and Boolean satisfiability IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Farzan Fallah, Srinivas Devadas, Kurt Keutzer	2001	30
16	Reducing the Sub-threshold and Gate-tunneling Leakage of SRAM Cells using Dual-Vt and Dual-Tox Assignment Behnam Amelifard, Farzan Fallah, Massoud Pedram	2006	30
17	Factoring and eliminating common subexpressions in polynomial expressions Anup Hosangadi, Farzan Fallah, Ryan Kastner	2005	28
18	Charge Recycling in Power-Gated CMOS Circuits IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram	2008	25
19	Accelerated SAT-based scheduling of control/data flow graphs Seda Öǧrenci Memik, Farzan Fallah	2003	24
20	Quick detection of difficult bugs for effective post-silicon validation David C. Lin, Ted Hong, Farzan Fallah, Nagib Hakim, Subhasish Mitra	2012	23

About Farzan Fallah

Farzan Fallah is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computational Theory and Mathematics, Software and Computer Networks and Communications, having authored 53 papers that have together received 1.4k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (37 papers), Embedded Systems Design Techniques (20 papers), VLSI and Analog Circuit Testing (18 papers), Parallel Computing and Optimization Techniques (16 papers), Advancements in Semiconductor Devices and Circuit Design (12 papers), Radiation Effects in Electronics (8 papers), Formal Methods in Verification (8 papers) and VLSI and FPGA Design Techniques (7 papers). The work is most often cited by research in Hardware and Architecture (693 citations), Software (227 citations), Electrical and Electronic Engineering (1.1k citations), Computational Theory and Mathematics (288 citations) and Computer Networks and Communications (157 citations). Farzan Fallah has collaborated with scholars based in United States, Japan and Switzerland. Frequent co-authors include Massoud Pedram, Srinivas Devadas, Afshin Abdollahi, Kurt Keutzer, Behnam Amelifard, Ryan Kastner, Pranav N Ashar, Subhasish Mitra, Seda Öǧrenci Memik and Ehsan Pakbaznia. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEICE Transactions on Electronics, Journal of Circuits Systems and Computers and Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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