D.E. Dever
Impact in
- Hardware and Architecture top 2%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
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- Low-power high-performance VLSI design
- VLSI and FPGA Design Techniques
- 3D IC and TSV technologies
- Electromagnetic Compatibility and Noise Suppression
Papers in
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- Parallel Computing and Optimization Techniques 5
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- Low-power high-performance VLSI design 8
- Advancements in Semiconductor Devices and Circuit Design 1
- Co-authors
- S. Mehta (3 shared papers)B.J. Benschneider (2 shared papers)P.I. Rubinfeld (1 shared paper)Peter Bannon (1 shared paper)D.R. Donchin (1 shared paper)Vidya Rajagopalan (1 shared paper)S. Felix (2 shared papers)M.K. Gowan (2 shared papers)
- Journals
- IEEE Journal of Solid-State Circuits (2 papers)Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference (4 papers)ACM Great Lakes Symposium on VLSI (GLSVLSI) (1 paper)
- Partner nations
- United States
In The Last Decade
D.E. Dever
10 papers receiving 551 citations
Peers
Comparison fields: 5 of 20
- Hardware and Architecture 294
- Electrical and Electronic Engineering 423
- Computer Networks and Communications 57
- Computational Theory and Mathematics 17
- Software 4
Countries citing papers authored by D.E. Dever
This map shows the geographic impact of D.E. Dever's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D.E. Dever with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D.E. Dever more than expected).
Fields of papers citing papers by D.E. Dever
This network shows the impact of papers produced by D.E. Dever. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D.E. Dever. The network helps show where D.E. Dever may publish in the future.
Co-authors
The 21 scholars most cited alongside D.E. Dever, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 1992 | 310 | |
| 2 | 1995 | 129 | |
| 3 | 1995 | 67 | |
| 4 | A 200-MHz 64-bit Dual-Issue CMOS Microprocessor. | 1992 | 54 |
| 5 | 2002 | 34 | |
| 6 | 2005 | 31 | |
| 7 | 2003 | 10 | |
| 8 | 2003 | 9 | |
| 9 | 1990 | 8 | |
| 10 | 2002 | 7 |
About D.E. Dever
D.E. Dever is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Nuclear Energy and Engineering, Waste Management and Disposal and Infectious Diseases, having authored 10 papers that have together received 659 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (8 papers), Parallel Computing and Optimization Techniques (5 papers) and Advancements in Semiconductor Devices and Circuit Design (1 paper). The work is most often cited by research in Hardware and Architecture (294 citations), Electrical and Electronic Engineering (423 citations), Computer Networks and Communications (57 citations), Computational Theory and Mathematics (17 citations) and Software (4 citations). D.E. Dever has collaborated with scholars based in United States. Frequent co-authors include S. Mehta, B.J. Benschneider, P.I. Rubinfeld, Peter Bannon, D.R. Donchin, Vidya Rajagopalan, S. Felix, M.K. Gowan, P.E. Gronowski and R.P. Preston. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference and ACM Great Lakes Symposium on VLSI (GLSVLSI).
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.