D.B. Lavo
Impact in
- Hardware and Architecture top 2%
- VLSI and Analog Circuit Testing
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- Integrated Circuits and Semiconductor Failure Analysis
- Radiation Effects in Electronics
- VLSI and FPGA Design Techniques
Papers in
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- VLSI and Analog Circuit Testing 9
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- Integrated Circuits and Semiconductor Failure Analysis 9
- VLSI and FPGA Design Techniques 1
- Radiation Effects in Electronics 1
- Low-power high-performance VLSI design 1
- Co-authors
- T. Larrabee (9 shared papers)B. Chess (6 shared papers)I. Hartanto (2 shared papers)Brian Neil Levine (1 shared paper)J.J. Garcia‐Luna‐Aceves (1 shared paper)F.J. Ferguson (4 shared papers)Kenneth M. Butler (2 shared papers)J. Saxena (2 shared papers)
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)Defense Technical Information Center (DTIC) (1 paper)
- Partner nations
- United States
In The Last Decade
D.B. Lavo
10 papers receiving 379 citations
Peers
Comparison fields: 5 of 20
- Hardware and Architecture 312
- Electrical and Electronic Engineering 310
- Computer Networks and Communications 101
- Software 13
- Control and Systems Engineering 64
Countries citing papers authored by D.B. Lavo
This map shows the geographic impact of D.B. Lavo's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D.B. Lavo with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D.B. Lavo more than expected).
Fields of papers citing papers by D.B. Lavo
This network shows the impact of papers produced by D.B. Lavo. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D.B. Lavo. The network helps show where D.B. Lavo may publish in the future.
Co-authors
The 9 scholars most cited alongside D.B. Lavo, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 1996 | 95 | |
| 2 | 2003 | 78 | |
| 3 | 2002 | 67 | |
| 4 | 1998 | 41 | |
| 5 | 2002 | 39 | |
| 6 | 2002 | 27 | |
| 7 | 2002 | 25 | |
| 8 | 2002 | 21 | |
| 9 | 2002 | 13 | |
| 10 | 2002 | 1 |
About D.B. Lavo
D.B. Lavo is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Control and Systems Engineering, Software and Computer Networks and Communications, having authored 10 papers that have together received 407 indexed citations. Recurring topics across this work include Integrated Circuits and Semiconductor Failure Analysis (9 papers), VLSI and Analog Circuit Testing (9 papers), Engineering and Test Systems (4 papers), Software Testing and Debugging Techniques (2 papers), VLSI and FPGA Design Techniques (1 paper), Radiation Effects in Electronics (1 paper), Low-power high-performance VLSI design (1 paper) and Distributed systems and fault tolerance (1 paper). The work is most often cited by research in Hardware and Architecture (312 citations), Electrical and Electronic Engineering (310 citations), Computer Networks and Communications (101 citations), Software (13 citations) and Control and Systems Engineering (64 citations). D.B. Lavo has collaborated with scholars based in United States. Frequent co-authors include T. Larrabee, B. Chess, I. Hartanto, Brian Neil Levine, J.J. Garcia‐Luna‐Aceves, F.J. Ferguson, Kenneth M. Butler, J. Saxena and H. Balachandran. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Defense Technical Information Center (DTIC).
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.