Clark Roberts
Impact in
- Hardware and Architecture top 2%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
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- Interconnection Networks and Systems
Papers in
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- Advancements in PLL and VCO Technologies 8
- Low-power high-performance VLSI design 4
- Semiconductor materials and devices 3
- Semiconductor Lasers and Optical Devices 2
- 3D IC and TSV technologies 2
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- VLSI and Analog Circuit Testing 2
- Embedded Systems Design Techniques 1
- Co-authors
- H. Wilson (1 shared paper)Sriram Vangal (1 shared paper)Saurabh Dighe (1 shared paper)Vasantha Erraguntla (1 shared paper)Yatin Hoskote (1 shared paper)Nitin Borkar (1 shared paper)D. Finan (1 shared paper)Tiju Jacob (1 shared paper)
- Partner nations
- United StatesCanadaIndia
In The Last Decade
Clark Roberts
11 papers receiving 683 citations
Clark Roberts's Hit Papers
Peers
Comparison fields: 5 of 29
- Hardware and Architecture 360
- Computer Networks and Communications 430
- Electrical and Electronic Engineering 485
- Electronic, Optical and Magnetic Materials 55
- Biomedical Engineering 44
Countries citing papers authored by Clark Roberts
This map shows the geographic impact of Clark Roberts's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Clark Roberts with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Clark Roberts more than expected).
Fields of papers citing papers by Clark Roberts
This network shows the impact of papers produced by Clark Roberts. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Clark Roberts. The network helps show where Clark Roberts may publish in the future.
Co-authors
The 25 scholars most cited alongside Clark Roberts, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS Hit paper breakdown → | 2008 | 467 |
| 2 | 2010 | 54 | |
| 3 | 2014 | 43 | |
| 4 | 2013 | 38 | |
| 5 | 2013 | 29 | |
| 6 | 2014 | 29 | |
| 7 | 2010 | 26 | |
| 8 | 2014 | 17 | |
| 9 | 2015 | 5 | |
| 10 | 2002 | 4 | |
| 11 | 2005 | 2 |
About Clark Roberts
Clark Roberts is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Computer Networks and Communications, Control and Systems Engineering and Aerospace Engineering, having authored 11 papers that have together received 714 indexed citations. Recurring topics across this work include Advancements in PLL and VCO Technologies (8 papers), Low-power high-performance VLSI design (4 papers), Semiconductor materials and devices (3 papers), VLSI and Analog Circuit Testing (2 papers), Semiconductor Lasers and Optical Devices (2 papers), 3D IC and TSV technologies (2 papers), Electromagnetic Launch and Propulsion Technology (1 paper) and Embedded Systems Design Techniques (1 paper). The work is most often cited by research in Hardware and Architecture (360 citations), Computer Networks and Communications (430 citations), Electrical and Electronic Engineering (485 citations), Electronic, Optical and Magnetic Materials (55 citations) and Biomedical Engineering (44 citations). Clark Roberts has collaborated with scholars based in United States, Canada and India. Frequent co-authors include H. Wilson, Sriram Vangal, Saurabh Dighe, Vasantha Erraguntla, Yatin Hoskote, Nitin Borkar, D. Finan, Tiju Jacob, Shailendra Jain and Jason Howard. Their work appears in journals such as IEEE Journal of Solid-State Circuits.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.