Christopher Celio
Impact in
- Hardware and Architecture top 2%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
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- Interconnection Networks and Systems
- Distributed systems and fault tolerance
Papers in
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- Embedded Systems Design Techniques 5
- Parallel Computing and Optimization Techniques 2
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- Low-power high-performance VLSI design 5
- VLSI and FPGA Design Techniques 2
- Co-authors
- Krste Asanović (7 shared papers)Charles Gruenwald (1 shared paper)Jonathan M. Eastep (1 shared paper)Anant K. Agarwal (1 shared paper)Jason Miller (1 shared paper)Nathan Beckmann (1 shared paper)Harshad Kasture (1 shared paper)David A. Patterson (3 shared papers)
- Journals
- IEEE Micro (1 paper)IEEE Solid-State Circuits Letters (1 paper)International Conference on Field Programmable Logic and Applications (FPL) (1 paper)DSpace@MIT (Massachusetts Institute of Technology) (1 paper)ACM/IEEE International Symposium on Computer Architecture (ISCA) (1 paper)
- Partner nations
- United States
In The Last Decade
Christopher Celio
8 papers receiving 531 citations
Christopher Celio's Hit Papers
Peers
Comparison fields: 5 of 17
- Hardware and Architecture 403
- Computer Networks and Communications 124
- Software 11
- Electrical and Electronic Engineering 94
- Artificial Intelligence 36
Countries citing papers authored by Christopher Celio
This map shows the geographic impact of Christopher Celio's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Christopher Celio with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Christopher Celio more than expected).
Fields of papers citing papers by Christopher Celio
This network shows the impact of papers produced by Christopher Celio. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Christopher Celio. The network helps show where Christopher Celio may publish in the future.
Co-authors
The 19 scholars most cited alongside Christopher Celio, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | Graphite: A distributed parallel simulator for multicores Hit paper breakdown → | 2010 | 355 |
| 2 | The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor | 2015 | 107 |
| 3 | 2018 | 24 | |
| 4 | 2019 | 21 | |
| 5 | 2016 | 19 | |
| 6 | 2018 | 10 | |
| 7 | 2016 | 9 | |
| 8 | 2018 | 2 |
About Christopher Celio
Christopher Celio is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Nuclear Energy and Engineering, Waste Management and Disposal and Infectious Diseases, having authored 8 papers that have together received 547 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (5 papers), Embedded Systems Design Techniques (5 papers), Parallel Computing and Optimization Techniques (2 papers) and VLSI and FPGA Design Techniques (2 papers). The work is most often cited by research in Hardware and Architecture (403 citations), Computer Networks and Communications (124 citations), Software (11 citations), Electrical and Electronic Engineering (94 citations) and Artificial Intelligence (36 citations). Christopher Celio has collaborated with scholars based in United States. Frequent co-authors include Krste Asanović, Charles Gruenwald, Jonathan M. Eastep, Anant K. Agarwal, Jason Miller, Nathan Beckmann, Harshad Kasture, David A. Patterson, Jonathan R. Bachrach and Pi-Feng Chiu. Their work appears in journals such as IEEE Micro, IEEE Solid-State Circuits Letters, International Conference on Field Programmable Logic and Applications (FPL), DSpace@MIT (Massachusetts Institute of Technology) and ACM/IEEE International Symposium on Computer Architecture (ISCA).
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.