Yoshio Masubuchi

3 papers and 196 indexed citations i.

Yoshio Masubuchi is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Yoshio Masubuchi has authored 3 papers receiving a total of 196 indexed citations (citations by other indexed papers that have themselves been cited), including 3 papers in Hardware and Architecture, 1 paper in Electrical and Electronic Engineering and 1 paper in Computer Networks and Communications. Recurrent topics in Yoshio Masubuchi’s work include Embedded Systems Design Techniques (2 papers), Parallel Computing and Optimization Techniques (2 papers) and Advancements in PLL and VCO Technologies (1 paper). Yoshio Masubuchi is often cited by papers focused on Embedded Systems Design Techniques (2 papers), Parallel Computing and Optimization Techniques (2 papers) and Advancements in PLL and VCO Technologies (1 paper). Yoshio Masubuchi collaborates with scholars based in United States and Japan. Yoshio Masubuchi's co-authors include H. Peter Hofstee, D. Stasiak, T. Yamazaki, D. Wendel, Kazuaki Yazawa, S. Weitzel, C. Johns, Mingjun Wang, M. Riley and S. Asano and has published in prestigious journals such as Electronics and Communications in Japan (Part III Fundamental Electronic Science), CiteSeer X (The Pennsylvania State University) and Asia and South Pacific Design Automation Conference.